ISL6596 Intersil Corporation, ISL6596 Datasheet

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ISL6596

Manufacturer Part Number
ISL6596
Description
Synchronous Rectified MOSFET Driver
Manufacturer
Intersil Corporation
Datasheet
®
Data Sheet
Synchronous Rectified MOSFET Driver
The ISL6596 is a high frequency, MOSFET driver optimized
to drive two N-Channel power MOSFETs in a synchronous
buck converter topology. This driver combined with Intersil’s
Multi-Phase Buck PWM controllers forms a complete single-
stage core-voltage regulator solution with high efficiency
performance at high switching frequency for advanced
microprocessors.
The IC is biased by a single low voltage supply (5V),
minimizing driver switching losses in high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3nF load with less than
10ns rise/fall time. Bootstrapping of the upper gate driver is
implemented via an internal low forward drop diode,
reducing implementation cost, complexity, and allowing the
use of higher performance, cost effective N-Channel
MOSFETs. Adaptive shoot-through protection is integrated
to prevent both MOSFETs from conducting simultaneously.
The ISL6596 features 4A typical sink current for the lower
gate driver, enhancing the lower MOSFET gate hold-down
capability during PHASE node rising edge, preventing power
loss caused by the self turn-on of the lower MOSFET due to
the high dV/dt of the switching node.
The ISL6596 also features an input that recognizes a high-
impedance state, working together with Intersil multi-phase
3.3V or 5V PWM controllers to prevent negative transients
on the controlled output voltage when operation is
suspended. This feature eliminates the need for the schottky
diode that may be utilized in a power system to protect the
load from negative output voltage damage.
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile High Efficiency DC/DC
Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
Related Literature
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN (MLFP) Packages”
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
1
November 2, 2005
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• 0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
- Fast Output Rise and Fall Time
- Low Tri-State Hold-Off Time (20ns)
• Support 3.3V and 5V PWM Input
• Low Quiescent Supply Current
• Power-On Reset
• Expandable Bottom Copper Pad for Heat Spreading
• Dual Flat No-Lead (DFN) Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART
PART
NUMBER
MARKING
ISL6596CBZ
6596CBZ
(Note)
ISL6596CBZ-T
6596CBZ
(Note)
ISL6596CRZ
596Z
(Note)
ISL6596CRZ-T
596Z
(Note)
ISL6596IBZ
(Note)
ISL6596IBZ-T
(Note)
ISL6596IRZ
96IZ
(Note)
ISL6596IRZ-T
96IZ
(Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc.
Intel® is a registered trademark of Intel Corporation. AMD® is a registered trademark of Advanced Micro Devices, Inc.
ISL6596
FN9240.0
TEMP
RANGE
PKG.
(°C)
PACKAGE
DWG. #
8 Ld SOIC
0 to 70
M8.15
8 Ld SOIC Tape and Reel
10 Ld 3x3 DFN L10.3x3
0 to 70
10 Ld DFN Tape and Reel
-40 to 85 8 Ld SOIC
M8.15
8 Ld SOIC Tape and Reel
-40 to 85 10 Ld 3x3 DFN L10.3x3
10 Ld DFN Tape and Reel
Copyright © Intersil Americas Inc. 2005. All Rights Reserved

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ISL6596 Summary of contents

Page 1

... PHASE node rising edge, preventing power loss caused by the self turn-on of the lower MOSFET due to the high dV/dt of the switching node. The ISL6596 also features an input that recognizes a high- impedance state, working together with Intersil multi-phase 3. PWM controllers to prevent negative transients on the controlled output voltage when operation is suspended ...

Page 2

... Pinout ISL6596 (SOIC) TOP VIEW UGATE 1 BOOT 2 PWM 3 GND 4 Block Diagram VCC VCTRL PWM VCTRL = CONTROLLER VCC 2 ISL6596 8 PHASE 7 VCTRL 6 VCC 5 LGATE ISL6596 SHOOT- THROUGH 7k PROTECTION CONTROL LOGIC 7k ISL6596 (DFN) TOP VIEW 1 10 UGATE PHASE 2 9 BOOT VCTRL 3 8 N/C N PWM ...

Page 3

... Typical Application - Multi-Phase Converter Using ISL6596 Gate Drivers +3.3V +3.3V FB COMP VCC VSEN PWM1 PWM2 PGOOD PWM CONTROLLER (ISL69XX) ISEN1 VID (OPTIONAL) ISEN2 FS/EN GND R IS REQUIRED FOR SPECIAL POWER SEQUENCING APPLICATIONS UGPH 3 ISL6596 +5V BOOT VCC VCTRL UGATE PWM ISL6596 PHASE LGATE +5V BOOT VCC ...

Page 4

... Upper Drive Sink Resistance Lower Drive Source Resistance Lower Drive Sink Resistance NOTE: 4. Guaranteed by Characterization. Not 100% tested in production. 4 ISL6596 Thermal Information Thermal Resistance (Notes 1, 2, & 3) SOIC Package (Note DFN Package (Notes 2 & 3 -0. (DC) Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65° ...

Page 5

... RU UGATE LGATE 1V t PDLL 5 ISL6596 LGATE (Pin 5) Lower gate drive output. Connect to gate of the low side N-Channel power MOSFET. A gate resistor is never recommended on this pin interferes with the operation shoot-through protection circuitry. VCC (Pin 6) Connect this pin to a +5V bias supply. Locally bypass with a high quality ceramic capacitor to ground ...

Page 6

... MOSFET due to high dV/dt of the switching node. PWM Input and Threshold Control A unique feature of the ISL6596 is the programmable PWM logic threshold set by the control pin (VCTRL) voltage. The VCTRL pin should connect to the VCC of the controller, thus the PWM logic threshold follows with the voltage level of the controller ...

Page 7

... Q CC the driver without capacitive load and is typically negligible. 7 ISL6596 The total gate drive power losses are dissipated among the resistive components along the transition path. The drive resistance dissipates a portion of the total gate drive power losses, the rest will be dissipated by the external gate ...

Page 8

... ISL6596 Upper MOSFET Self Turn-On Effects At Startup Should the driver have insufficient bias voltage applied, its outputs are floating. If the input bus is energized at a high ...

Page 9

... D2 (DATUM B) D2 INDEX AREA (DATUM N (Nd-1)Xe REF. BOTTOM VIEW 0.415 NX (b) (A1) 5 SECTION "C-C" 9 ISL6596 2X L10.3x3 0. LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE 2X 0. SYMBOL 0. 0. NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...

Page 10

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 ISL6596 M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE ...

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