ISL6597 Intersil Corporation, ISL6597 Datasheet
ISL6597
Related parts for ISL6597
ISL6597 Summary of contents
Page 1
... N-Channel MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously. The ISL6597 features 4A typical sink current for the lower gate driver, enhancing the lower MOSFET gate hold-down capability during PHASE node rising edge, preventing power loss caused by the self turn-on of the lower MOSFET due to the high dV/dt of the switching node ...
Page 2
... LD QFN) TOP VIEW GND 17 LGATE1 2 11 PGND PVCC ISL6597 PVCC SHOOT- THROUGH PROTECTION PVCC1 PGND PVCC SHOOT- THROUGH PROTECTION PVCC PGND PAD UGATE1 BOOT1 BOOT2 UGATE2 BOOT1 UGATE1 PHASE1 CHANNEL 1 LGATE1 PGND BOOT2 ...
Page 3
... Typical Application - Multiphase Converter Using ISL6597 Gate Drivers COMP FB V VSEN CC ISEN1 PWM1 PGOOD EN PWM2 ISEN2 MAIN CONTROL ISL65xx VID ISEN3 FS/DIS PWM3 PWM4 GND ISEN4 3 ISL6597 BOOT1 +3.3V UGATE1 VCTRL PHASE1 +5V LGATE1 +3.3V PVCC DUAL DRIVER VCC ISL6597 BOOT2 EN UGATE2 PWM1 PHASE2 ...
Page 4
... Tri-State Upper Threshold Tri-State Shutdown Holdoff Time SWITCHING TIME (Note 3, See Figure 1) UGATE Rise Time LGATE Rise Time UGATE Fall Time 4 ISL6597 Thermal Information Thermal Resistance (Notes 1 and 2) QFN Package . . . . . . . . . . . . . . . . . . Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150° -0. (DC) Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C -0. (< ...
Page 5
... PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the controller. 17 PAD Connect this pad to the power ground plane (PGND) via thermally enhanced connection. 5 ISL6597 = 0°C to +70°C, unless otherwise noted (Continued) A SYMBOL TEST CONDITIONS t ...
Page 6
... MOSFET due to high dV/dt of the switching node. Tri-State PWM Input A unique feature of the ISL6597 is the programmable PWM ] logic threshold set by the control pin (VCTRL) voltage. The FL VCTRL pin should connect to the controller’s VCC so that the PWM logic thresholds follow with the VCC voltage level ...
Page 7
... PWM line of ISL6597 (assuming an Intersil PWM controller is used). Bootstrap Considerations This driver features an internal bootstrap diode. Simply adding an external capacitor across the BOOT and PHASE pins completes the bootstrap circuit. The following equation helps select a proper bootstrap capacitor size: Q GATE ≥ ...
Page 8
... Figure implemented to prevent the bootstrap capacitor from 8 ISL6597 overcharging, exceeding the device rating. Low-profile MOSFETs, such as Direct FETs and multi-SOURCE leads D devices (SO-8, LFPAK, PowerPAK), have low parasitic lead GD inductances and are preferred ...
Page 9
... PCB capacitances are also not taken into account. These equations are provided for guidance purpose only. Therefore, the actual coupling effect should be examined using a very high impedance (10MΩ or greater) probe to ensure a safe design margin. 9 ISL6597 dV ⋅ ⋅ V ------- ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 ISL6597 L16.4x4 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220-VGGC ISSUE C) ...