ISL88042 Intersil Corporation, ISL88042 Datasheet - Page 5

no-image

ISL88042

Manufacturer Part Number
ISL88042
Description
Quadruple Voltage Monitor
Manufacturer
Intersil Corporation
Datasheet
www.DataSheet4U.com
point to some other voltage above 600mV according to
Equation 1:
Power-On Reset (POR)
Applying power to the ISL88042 activates a POR circuit, which
makes the reset pin(s) active (i.e. RST goes high while RST
goes low). These signals provide several benefits:
• They prevent the system microprocessor from starting to
• They prevent the processor from operating prior to
• They ensure that the monitored device is held out of
• They allow time for an FPGA to download its configuration
V
TRIP
operate with insufficient voltage.
stabilization of the oscillator.
operation until internal registers are properly loaded.
prior to initialization of the circuit.
=
V2MON
0.6V
V
VXMON
RST
DD /
MR
×
RST
R
V
1V
1
TH1/
+
R
V
2
TH2
/
R
2
t
5
POR
V
TH
FIGURE 2. POWER SUPPLY MONITORING DIAGRAM
FIGURE 3. VOLTAGE MONITORING DIAGRAM
t
RPD
t
RPD
(EQ. 1)
ISL88042
t
POR
The reset signal remains active until V
minimum voltage sense level for time period t
ensures that the supply voltage has stabilized to sufficient
operating levels.
Manual Reset
The manual-reset input (MR) allows the user to trigger a reset
by using a push-button switch or by signaling the input low. The
MR input is an active low debounced input. Reset is asserted if
the MR pin is pulled low to less than 100mV for the minimum
MR pulse width or longer while the push-button is closed. After
MR is released, the reset output remains asserted low for t
(200ms) and then is released.
Figures 2 and 3 illustrate the ISL88042’s operation.
t
POR
>t
>t
MR
MD
t
POR
DD
rises above the
POR
. This
June 8, 2009
FN6655.1
POR

Related parts for ISL88042