PUMA2F16006A-70E Mosaic Semiconductor, PUMA2F16006A-70E Datasheet
PUMA2F16006A-70E
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PUMA2F16006A-70E Summary of contents
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West Bernado Court, Suite 100, San Diego, CA 92127. Tel No: (619) 674 2233, Fax No: (619) 674 2230 Description Available in PGA (PUMA 2) and Gullwing (PUMA77) footprints. The PUMA **F16006 is a 16MBit Flash module user configurable ...
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ISSUE 4.2 : NOVEMBER 1998 Absolute Maximum Ratings (1) Voltage on any pin w.r.t. Gnd (2) Supply Voltage (3) Voltage on A9 w.r.t. Gnd Storage Temperature Notes : (1) Stresses above those listed may cause permanent damage to the device. ...
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PUMA 2/77 F16006/A - 70/90/12 Capacitance (T =25°C,f=1MHz) A Parameter Input Capacitance Address, OE Other pins Output Capacitance 32 bit Note: These parameters are calculated, not measured. AC Test Conditions * Input pulse levels : 0.0V to 3.0V * Input ...
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ISSUE 4.2 : NOVEMBER 1998 Write/Erase/Program Parameter Symbol (4) Write Cycle time t WC Address Setup time t AS Address Hold time t AH Data Setup Time t DS Data hold Time t DH Output Enable Setup Time t OES ...
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PUMA 2/77 F16006/A - 70/90/12 Write/Erase/Program Alternate CS controlled Writes Parameter Symbol Write Cycle time ( Address Setup time t AS Address Hold time t AH Data Setup Time t DS Data hold Time t DH Output Enable ...
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ISSUE 4.2 : NOVEMBER 1998 AC Waveforms for Read Operation Addresses Outputs AC Waveforms Program 5555H PA Address GHWL WHP DATA ...
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PUMA 2/77 F16006/A - 70/90/12 A.C Waveforms - Alternate CS controlled Program operation timings 5555H PA Address GHE DATA ...
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ISSUE 4.2 : NOVEMBER 1998 AC Waveforms for Toggle Bit During Embedded Algorithm Operations OEH OE DATA DQ6=Toggle (DQ0-DQ7 DQ6 stops toggling ( the device has completed the embedded operations) AC Waveforms For Sector ...
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PUMA 2/77 F16006/A - 70/90/12 AC Waveforms for Sector Unprotect A18 A17 A16 VID or VSP A9 DATA VSP 5.0V WE VSP 5. Waveforms Chip / Sector Erase tAS tAS Address Address 5555H ...
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ISSUE 4.2 : NOVEMBER 1998 Embedded Programming Algorithm Increment Address Program Command Sequence (Address /Command) Start Write Program Command Sequence (see below) Data Poll Device Last No Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program data 10 PUMA ...
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PUMA 2/77 F16006/A - 70/90/12 Embedded Erase Algorithm Write Erase Command Sequence Chip Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H START See below Data Poll or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Mulitiple Sector Erase Command ...
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ISSUE 4.2 : NOVEMBER 1998 Data Polling Algorithm NOTE: 1. DQ7 is rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5 Byte address for programming. = Any of the sector addresses within the ...
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PUMA 2/77 F16006/A - 70/90/12 Sector Unprotect Algorithm START Protect All Sectors PLSCNT = 1 Set A0=A9=Vil A5=Vih (setup for sector unprotection) Set /OE=Vid orVsp /WE=Vsp Activate first /CE pulse Time Out 100us /CE=Vih Activate second /CE pulse Increment Sector ...
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ISSUE 4.2 : NOVEMBER 1998 Sector Protection Algorithm Increment PLSCNT NO PLSCNT = 25 ? YES Remove VID from A9 Write Reset Command Device Failed START Set Up Sector Addr (A20, A19, A18) PLSCNT = 1 OE=VID, A9=VID OE = ...
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PUMA 2/77 F16006/A - 70/90/12 Device Operation The following description deals with the device operating in 8 bit mode accessed through CS1, however status flag definitions shown apply equally to the corresponding flag for each device in the module. Read ...
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ISSUE 4.2 : NOVEMBER 1998 Command Definitions Device operations are selected by writing specific address and data sequences into the command register. The following table defines these register command sequences. Bus Write First Bus Command Cycles Write Cycle Sequence Req'd ...
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PUMA 2/77 F16006/A - 70/90/12 Sector Protection The device features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 8). The sector protect feature is enabled using programming equipment at ...
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ISSUE 4.2 : NOVEMBER 1998 Autoselect Command Flash memories are intended for use in applications where the local CPU alters memory contents. As such, manufacture and device codes must be accessible while the device resides in the target systems. PROM ...
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PUMA 2/77 F16006/A - 70/90/12 Sector Erase Sector erase is a six bus cycle operation. There are two "unlock"write cycles. These are followed by writing the "Set-up" command. Two more "unlock" write cycles are then followed by the sector erase ...
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ISSUE 4.2 : NOVEMBER 1998 Operating Modes The following modes are used to control the device. OPERATION Auto-Select Manufacturer Code Auto Select Device Code Read (1) Standby Output Disable Write Enable Sector Protect Verify Sector Protect 1) L=V , H=V ...
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PUMA 2/77 F16006/A - 70/90/12 D Toggle Bit 6 The device also features the "toggle bit" method to indicate to the host system that the Embedded Algorithms are in progress or completed. During an Embedded Program or Erase ...
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ISSUE 4.2 : NOVEMBER 1998 Data Protection The device is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transition. During power up the device automatically resets the internal ...
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PUMA 2/77 F16006/A - 70/90/12 Package Details PUMA 77F16006 25.15 (0.990) sq. 24.67 (0.970) sq. 22.61 (0.890) sq. 22.10 (0.870) sq. PUMA 2F16006 27.69 (1.090) square 27.08 (1.066) square LEAD FINISH IS 300 µINCH MINIMUM SOLDER OVER 50 TO 350 ...
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ISSUE 4.2 : NOVEMBER 1998 Pin Definitions PUMA 77F16006 ...
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PUMA 2/77 F16006/A - 70/90/12 Military Screening Procedure MultiChip Screening Flow for high reliability product in accordance with Mil-883 method 5004 shown below MB MULTICHIP MODULE SCREENING FLOW SCREEN Visual and Mechanical Internal visual Temperature cycle Constant acceleration Burn-In Pre-Burn-in ...
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ISSUE 4.2 : NOVEMBER 1998 Ordering Information PUMA 2F16006AMB-80E NOTE : E is designated to parts with extended Erase/Write Cycle Endurance (100,000 Min.). If not specified when ordered only a Erase/Write Cycle Endurance of 10,000 Minimum can be guaranteed. Note ...