PUMA2F16006B-12 Advanced Packaging Technology Of America, PUMA2F16006B-12 Datasheet
PUMA2F16006B-12
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PUMA2F16006B-12 Summary of contents
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Description Available in PGA (PUMA 2) and Gullwing (PUMA77) footprints. The PUMA **F16006 is a 16MBit FLASH module user configurable as 512K x 32 The device is available with access times of 70, ...
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Pin Definitions PUMA77F16006 Pin Signal /CS3 ...
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PAGE 3 PUMA77F16006B Pin Signal Pin Signal / /CS3 36 /CS2 A17 /WE2 /WE3 /WE4 A18 ...
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... D27 /WE3 53 /CS3 D19 56 D31 57 D30 58 D29 59 D28 D23 64 D22 65 D21 66 D20 PUMA2F16006B Pin Signal Pin Signal D24 D25 3 D10 36 D26 4 A14 A16 38 A12 6 A11 A13 8 A18 ...
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Absolute Maximum Ratings Parameter Voltage on any pin relative (2) Supply Voltage (3) Voltage on A9 relative Storage Temperature Notes : (1) Stresses above those listed may cause permanent damage to the device. This ...
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Capacitance (V = 5.0V F=1MHz Parameter Input Capacitance ( Address, /OE,) Other Pins Output Capacitance 32 bit mode Note : These Parameters are calculated not measured. Test Conditions • Input pulse levels : ...
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Read Cycle Parameter Address Valid to Next Address Valid. Address Valid to Output Valid Chip Select Low to Output Transition Chip Select Low to Output Valid Output Enable Low to Output Transition Output Enable Low to Output Valid Chip Enable ...
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Erase/Program Alternate /CS controlled Writes Parameter Address Valid to Next Address Valid Write Enable Low to Chip Select Low Chip Select Low to Chip Select High Input Valid to Chip Select High Chip Select High to Input Transition Chip Select ...
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Figure 1 - Read Mode A0~A18 /CS# /OE D0~D7 Figure 2 - Write AC Waveform /WE Controlled A0 ~ A18 /CS# /OE t GHWL /WE VCS PAGE Valid t ACC t ...
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Figure 3 - Write AC Waveforms /CS Controlled A0 ~ A18 /WE# /OE /CS VCS PAGE Valid GHEL Valid ...
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Figure 4 - Data Polling Figure 5 - Data Toggle PAGE 11 START Read D5 & VALID ADDRESS Yes D7=Data No D5=1 No Yes Read D7 Yes D7=Data No FAIL PASS START Read D5 & ...
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There are five standard bus operations that control the device. These are Bus Read, Bus Write, Output Disable, Standby and Automatic Standby. See Table 2, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or ...
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Electronic Signature Block Protection and Blocks Unprotection PAGE 13 The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in ...
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All Bus Write operations to the memory are interpreted by the Command Interface. Commands consist of one or more sequential Bus Write operations. Failure to observe a valid sequence of Bus Write operations will result in the memory returning to ...
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Unlock Bypass Command Unlock Bypass Program Command Unlock Bypass Reset Command Chip Erase Command PAGE 15 Note that the Program command cannot change a bit set at ’0’ back to ’1’ and attempting will cause an error. ...
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Block Erase Command Erase Suspend Command PAGE 16 After the Chip Erase operation has completed the memory will return to the Read Mode, unless an error has occurred. When an error occurs the memory will continue to output the Status ...
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Erase Resume Command PAGE 17 During Erase Suspend it is possible to Read and Program cells in blocks that are not being erased; both Read and Program operations behave as normal on these blocks. Reading from blocks that are being ...
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Bus Read operations from any address always read the Status Register during Program and Erase operations also read during Erase Suspend when an address within a block being erased is accessed. The bits in the Status Register are ...
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Erase Timer Bit (D3) Alternative Toggle Bit (D2) PAGE 19 Note that the Program command cannot change a bit set at ’0’ back to ’1’ and attempting willcause an error. One of the Erase commands must be ...
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Table 1 : Block Addresses Size (Kbytes Table 2 : Bus Operations Operation /CS Bus Read V IL Bus Write V IL Output Disable X Standby V IH Note : X=V or ...
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Table 4 : Commands Command Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data 1 X Read / Reset 3 555 Autoselect 3 555 Program 4 555 Unlock Bypass 3 555 Unlock Bypass 2 X Program Unlock ...
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Table 5 - Program, Erase Times and Program, Erase Endurance Cycles - Parameter Chip Erase (All bits in memory set Chip Erase Block Erase (64 Kbytes) Program ...
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Military Screening Procedure For High Reliability product in accordance with Mil-883 Method 5004 Shown Below PUMA 77 MB Grade Multi Chip Module Screening Flow Screen Visual Mechanical Internal Visual Temperature Cycle Constant Acceleration Burn In Pre-Burn-In electrical Burn-In Final Electrical ...
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PUMA 2 MB Component Screening Flow Screen Visual Mechanical External Visual Temperature Cycle Burn In Pre-Burn-In electrical Burn-In Final Electrical Tests Static (dc) Functional Switching (ac) Percent Defective Allowable (PDA ) Quality Conformance External Visual PAGE 24 Test Method 17 ...
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PUMA 2 - JEDEC 66 pin Ceramic PGA. 27.69 (1.090) Sq. Max. 4.83 (0.190) 4.32 (0.170) LEAD FINISH IS 300 INCH MINIMUM SOLDER OVER 50 TO 350 INCH NICKEL 6.86 (0.270) max PUMA 77 - JEDEC 68 Leaded Ceramic Gullwing ...