PUMA2F4006M-12 Mosaic Semiconductor, PUMA2F4006M-12 Datasheet
PUMA2F4006M-12
Related parts for PUMA2F4006M-12
PUMA2F4006M-12 Summary of contents
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West Bernado Court, Suite 100, San Diego, CA 92127. Tel No: (619) 674 2233, Fax No: (619) 674 2230 General Description The PUMA 2F4006 is a 4,194,304 bit CMOS 5.0V only FLASH memory pin ceramic PGA ...
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PUMA 2F4006 - 70/90/12 DC OPERATING CONDITIONS Absolute Maximum Ratings (1) (2) Voltage on any pin w.r.t. Gnd (except A9) (2) Supply Voltage Voltage on A w.r.t. Gnd 9 Storage Temperature Notes : (1) Stresses above those listed may cause ...
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PUMA 2F4006 - 70/90/12 AC Test Conditions * Input pulse levels : 0.0V to 3.0V * Input rise and fall times : Input and output timing reference levels : 1. +/- 10% CC ...
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PUMA 2F4006 - 70/90/12 AC OPERATING CONDITIONS Read Parameter Read Cycle Time Address to output delay Chip Select to output Output Enable to output Chip Select to O/P High Z Output Enable to output High Z Output hold time (From ...
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PUMA 2F4006 - 70/90/12 Write/Erase/Program (Alternate CS1~4 controlled Writes) Parameter Write Cycle time Address Setup time Address Hold time Programming operation Data hold Time Output Enable Setup Time Output Enable Hold Time Read Recover before Write WE1~4 setup time WE1~4 ...
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PUMA 2F4006 - 70/90/12 AC Waveforms for Read Operation Address CS1~4 OE WE1~4 Data Out AC Programming Waveforms 5555H Address t WC CS1~4 t GHWL OE WE1 WPH CS A0H DATA t DS 5.0 V Notes ...
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PUMA 2F4006 - 70/90/12 AC Chip / Sector Erase Waveforms Address CS1~4 t GHWL OE WE1 Data t DS Vcc t VCS NOTES the address for Sector Erase. Addresses = don't care for Chip Erase. ...
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PUMA 2F4006 - 70/90/12 AC Waveforms for Toggle Bit During Embedded Algorithm Operations WE1~4 CS1~4 OE Data (D0~ stops toggling(The device has completed the Embedded operation used for 16 bit and 32 bit modes respectively. 8 ...
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PUMA 2F4006 - 70/90/12 AC Waveforms for Sector Unprotect A16 A15 A14 A0 A1 12V A12 12V 5V OE WE1~4 12V 5V CS1~4 Data t VLHT t VLHT t CSP t t WPP t VLHT t ...
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PUMA 2F4006 - 70/90/12 A.C Waveforms - Alternate CS1~4 controlled Program operation timings 5555H Address t WC WE1~4 t GHEL OE CS1 DATA V CC Notes address of the memory location to be programmed. 2. ...
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PUMA 2F4006 - 70/90/12 Command Definitions Device operations are selected by writing specific address and data sequences into the command register. The following table defines these register command sequences for 8 bit mode. For 16 and 32 bit mode, the ...
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PUMA 2F4006 - 70/90/12 Read Mode The PUMA 2F4006 has two control functions which must be satisfied in order to obtain data at the outputs. CS1~4 is the power control and should be used for device selection OE is the ...
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PUMA 2F4006 - 70/90/12 Sector Protection The PUMA 2F4006 features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 7). The sector protect feature is enabled using programming equipment at ...
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PUMA 2F4006 - 70/90/12 Autoselect Command Flash memories are intended for use in applications where the local CPU alters memory contents. As such, manufacture and device codes must be accessible while the device resides in the target systems. PROM programmers ...
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PUMA 2F4006 - 70/90/12 Sector Erase For 16 and 32 bit modes, the data values for the sector erase command sequence should be repeated on each byte of the data bus. Sector erase is a six bus cycle operation. There ...
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PUMA 2F4006 - 70/90/12 During the Embedded Erase Algorithm, D data "1". For chip erase, the Data Polling is valid after the rising edge of the sixth WE1~4 pulse in the 7 six write pulse sequence. For ...
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PUMA 2F4006 - 70/90/12 If Data Polling or the Toggle Bit indicates the device has been written with a valid erase command, D used to determine if the sector erase timer window is still open cycle has begun; ...
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PUMA 2F4006 - 70/90/12 Embedded Programming Algorithm Increment Address Program Command Sequence (Address /Command) NOTE:AA ,55 , and A0 above should be repeated on each byte of the data bus for 16 and 32 bit configurations, program ...
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PUMA 2F4006 - 70/90/12 Embedded Erase Algorithm Chip Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H NOTE: All data above should be repeated on each byte of the data bus for 16 and 32 bit configurations. START Write ...
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PUMA 2F4006 - 70/90/12 Data Polling Algorithm NOTE rechecked even because For 16 and 32 bit bits. TOGGLE Bit Algorithm NOTE: ...
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PUMA 2F4006 - 70/90/12 Sector Unprotect Algorithm Increment Sector Addr NOTES: SA0 = Sector Addr for intial sector SA7 = Sector Addr to last sector START Set Vcc=5.0V Protect All Sectors PLSCNT = 1 Set Up Sector Unprotect Mode A12 ...
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PUMA 2F4006 - 70/90/12 Sector Protection Algorithm Increment PLSCNT PLSCNT = 25 ? Yes Device Failed START Set Up Sector Addr (A16, A15, A14) PLSCNT = A9=V ,CS1~4 Activate WE1~4 Pulse Time Out ...
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PUMA 2F4006 - 70/90/12 Package Details Dimensions in mm(inches). PUMA Pin Ceramic PGA 27.55 (1.085) square 27.05 (1.065) square 8.13 (0.320) max Military Screening Procedure Module Screening Flow for high reliability product is in accordance with MIL-STD-883 ...
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PUMA 2F4006 - 70/90/12 Ordering Information PUMA 2F4006MB-70E Note : Although this data is believed to be accurate the information contained herein is not intended to and does not create any warranty of merchantibility or fitness for aparticular purpose. Our ...