US1050 ETC-unknow, US1050 Datasheet
US1050
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US1050 Summary of contents
Page 1
... Standard 3.3V Chip-Set and Logic Applications TYPICAL APPLICATION TYPICAL APPLICATION 1050app1-1.1 Typical Application of US1050 3.38V regulator designed Notes: Pentium P54C,P55C ,Klamath,Pentium Pro,VRE,are trade marks of Intel Corp.Cyrix M2 is trade mark of Cyrix Corp. Power PC is trade mark of IBM Corp. PACKAGE ORDER INFORMATION PACKAGE ORDER INFORMATION Tj (° ...
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... US1050 ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS Input Voltage (Vin) .................................................................. Power Dissipation ............................................ Storage Temperature Range .............................. - 150 C Operating Junction Temperature Range .................. 150 C PACKAGE INFORMATION PACKAGE INFORMATION 3 PIN PLASTIC TO220 ( PIN PLASTIC TO263 ( M ) FRONT VIEW FRONT VIEW Vin 3 Tab is Tab is ...
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... BLOCK DIAGRAM BLOCK DIAGRAM Vin 3 CURRENT LIMIT THERMAL SHUTDOWN Figure 1 - Simplified block diagram of the US1050 APPLICATION INFORMATION APPLICATION INFORMATION Introduction The US1050 adjustable Low Dropout (LDO) regulator terminal device which can easily be programmed with the addition of two external resistors to any volt- ages within the range of 1 ...
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... R1=121 and R2=200 Iadj is only 0.3% of the nominal set point. Load Regulation Since the US1050 is only a 3 terminal device , it is not possible to provide true remote sensing of the output voltage at the load.Figure 3 shows that the best load 2-36 regulation is achieved when the bottom side ...
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... AAVID Thermalloy Designing for Microprocessor Applications As it was mentioned before the US1050 is designed spe- cifically to provide power for the new generation of the low voltage processors requiring voltages in the range of 2.5V to 3.6V generated by stepping down the 5V supply. These processors demand a fast regulator that supports their large load current changes ...
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... Select R2=218 Selecting both R1 and R2 resistors to be 0.1% toler- ance, results in the least amount of error introduced by the resistor dividers leaving Max Allowed the US1050 reference which is within the initial accu- Output Tolerance 100 mV racy of the device. Finally , the input capacitor is selected as follows : ...
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... Vout terminal of the device as possible recom- mended to use a section of a layer of the PC board as a plane to connect the Vout pin to the output capacitors to prevent any high frequency oscillation that may result due to excessive trace inductance. Rev. 1.3 10/27/00 3.50V C2 5x 1500uF R1 121 0.1% R2 218 0.1% 1050app4-1.1 US1050 2-39 ...