ATSAM2533 ATMEL Corporation, ATSAM2533 Datasheet
ATSAM2533
Related parts for ATSAM2533
ATSAM2533 Summary of contents
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... Computer Karaokes, Portable Karaokes – Keyboards, Portable Keyboards Instruments 1. Description The ATSAM2533 is a low cost derivative of the ATSAM97xx series. It retains the same high quality synthesis with voices polyphony. The ATSAM2533 maxi- mum wavetable memory is 32 MBytes and the parallel communication is through a standard 8-bit port ...
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... UART, and the CODEC control interface, with minimum intervention from the control processor. www.DataSheet4U.com 2. ATSAM2533 IC Architecture Block Diagram Figure 2-1. P16 Processor 16-bit CISC Processor Core includes 256 x 16 Data RAM ATSAM2533 2 ATSAM2533 IC Architecture Block Diagram Synthesis/DSP 64 Slots RISC DSP Core Includes: ...
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... Karaoke and keyboard applications can take advantage of the parallel 8-bit interface to commu- nicate with the ATSAM2533 at high speed, with the MIDI IN and MIDI OUT signals remaining available. 6396A–DRMSD–15-Oct-08 ...
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... Portable Telephone Figure 4-1. ATSAM2533 4.2 Low Cost Karaoke, Hand-held Karaoke Figure 4-2. ATSAM2533 4.3 Low Cost Keyboard Instrument Figure 4-3. ATSAM2533 ATSAM2533 4 Portable Telephone CleanWave General MIDI Compliant Wavetable Synthesis ROM RISC DSP Core Parallel or Serial Interface Reverb + Chorus Surround Effect 4 Bands Parametric Equalizer DAC ...
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... Audio data has bits precision. Audio data bit clock, provides timing to DABD0-1, DAAD. Audio data word select. The timing of WSBD can be selected to be I2S or Japanese compatible. Stereo serial audio data input. General purpose programmable I/O pins. These pins have a built-in pull down. ATSAM2533 5 ...
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... PDWN 73, 74 – ATSAM2533 6 Function Debug clock, should be connected to VD33 under normal operation. If DBCLK is found low just after RESET, then the internal ROM debugger/Flash programmer is started Debug data, allows serial communication for debug/Flash programming. This pin has a built- in pull down. ...
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... WA20 WA5 65 WA21 GND 66 WA22 VD33 67 WA23 WA6 68 VD33 WA7 69 GND WA8 70 WCS WA9 71 WOE WA10 72 WWE WA11 VD33 75 VD33 ATSAM2533 Pin# Signal Name 76 GND 77 GND 78 TEST1 79 VD18 RESET 83 VD33 84 GND 85 DBCLK 86 DBACK 87 DBDATA 88 CKOUT 89 CLBD 90 WSBD 91 ...
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... Marking www.DataSheet4U.com 7. Mechanical Dimensions Figure 7-1. 100-lead Quad Flat Pack (LQFP100) ATSAM2533 8 FRANCE SAM2533 YYWW 58A66C XXXXXXXXX Pin 1 6396A–DRMSD–15-Oct-08 ...
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... This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions of this + 0.3V D33 specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ATSAM2533 9 ...
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... High level input voltage on non-5VT pins IH V Low level output voltage IOL=4mA OL V High level output voltage IOH=4mA OH ID18 Power supply current at (crystal freq.=12.288 MHz) ID33 – Power down supply current Rud Pull-up or Pull-down resistor ATSAM2533 10 Min 3 1.65 -25 = 25° 3.3V ± 10 D33 D18 Min -0 VD33-0 ...
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... V =1.8V, T D33 D18 Table 9-1 allows to select the best fit for a given application; Crystal Frequency Selection Chart Xtal (MHz) 12.288 11.2896 9.60 8.00 tavcs tcslrdl tprd trdldv ATSAM2533 = 25°C, all outputs except X2 have load capac- A tck (ns) ROM tA (ns) 20.35 92 22.14 101 26.04 120 31.25 146 trdhcsh tdrh 11 ...
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... RF Status register is read when • TE: Transmit Empty If 0, data from ATSAM2533 to host is pending and IRQ is high. Reading the data will set and clear IRQ. • RF: Receiver Full If 0, then ATSAM2533 is ready to accept DATA from host. ATSAM2533 ...
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... Output enable pulse width tACE Chip select/address access time tOE Output enable access time tDF Chip select or WOE high to input data Hi-Z 6396A–DRMSD–15-Oct-08 tRC tCSOE tPOE tOE tACE Min 5*tck 2*tck-5 - 5*tck-5 3*tck-5 0 ATSAM2533 tDF Typ Mx Unit - 6*tck ns - 3*tck+5 ns 3*tck - ...
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... External Flash Write Timing Parameters Symbol Parameter tWC Write cycle time tCSWE Write enable low from CS or Address or WOE tWP Write pulse width tDW Data out setup time tDH Data out hold time ATSAM2533 14 tWC tCSWE tWP tDW Min 5*tck 2*tck-10 4*tck-10 10 tDH Typ ...
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... Selection between I2S and Japanese format is a firmware option. • DAAD is 16 bits only. 6396A–DRMSD–15-Oct-08 Digital Audio Timing tcw tcw Min 8*tck-10 8*tck-10 - LSB LSB (16bits) (20bits) LSB (18bits) ATSAM2533 tclbd tsod tsod Typ 16*tck - MSB Unit ns ns ...
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... If PDWN is asserted low and VD18 connected to OUTVC18, then the crystal oscillator and PLL will be stopped. The chip enters a deep power down sleep mode, as power is removed from the core. To exit power down, PDWN has to be asserted high, then RESET applied. 11. Recommended Crystal Compensation Figure 11-1. ATSAM2533 16 Recommended Crystal Compensation 6396A–DRMSD–15-Oct-08 ...
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... GND, VD33, VD18 distribution, decouplings All GND, VD33, VD18 pins should be connected. A GND plane is strongly recommended below the ATSAM2533. The board GND + VD33 planes could be in grid form to minimize EMI. Recommended VD18 decoupling is 0.1 µF close to the VD18 pin and 470 pF in parallel with 2.2 or 4.7 µ ...
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... Revision History www.DataSheet4U.com Table 13-1. Document Ref. Comments 6396A First issue. ATSAM2533 18 Change Request Ref 6396A–DRMSD–15-Oct-08 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2008 Atmel Corporation. All rights reserved. Atmel trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Europe Le Krebs ...