74F112 Philips Semiconductors, 74F112 Datasheet

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74F112

Manufacturer Part Number
74F112
Description
Dual J-K negative edge-triggered flip-flop
Manufacturer
Philips Semiconductors
Datasheet

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Philips
Semiconductors
Product specification
IC15 Data Handbook
74F112
Dual J-K negative edge-triggered flip-flop
INTEGRATED CIRCUITS
1990 Feb 09

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74F112 Summary of contents

Page 1

... Dual J-K negative edge-triggered flip-flop Product specification IC15 Data Handbook Philips Semiconductors INTEGRATED CIRCUITS 1990 Feb 09 ...

Page 2

... Dual J-K negative edge-triggered flip-flop FEATURE Industrial temperature range available (– +85 C) DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level at the other inputs ...

Page 3

... Asynchronous Reset H* H* Undetermined * q q Toggle L H Load “0” (Reset Load “1” (Set Hold “no change” Hold “no change” 3 Product specification 74F112 SF00105 15, 14 RDn 3, 11 ...

Page 4

... CC I Jn, Kn CPn V = MAX 0. SDn, RDn V = MAX MAX CC , the use of high-speed test apparatus and/or sample-and-hold OS 4 Product specification 74F112 RATING UNIT –0.5 to +7.0 V –0.5 to +7.0 V – –0 +70 C –40 to +85 C –65 to +150 C LIMITS UNIT ...

Page 5

... M t (H) t (H) t ( max PLH PHL Product specification 74F112 LIMITS 10 +5.0V 10 – +85 C amb UNIT = 50pF C = 50pF 500 R = 500 L L MAX MIN MAX 80 MHz 7.5 2.0 7.5 7.5 2.0 7.5 7.5 1.5 7.5 7.5 1.5 7.5 LIMITS ...

Page 6

... Qn Qn Waveform 3. Propagation Delay for Reset to Output, Reset Pulse Width, and Recovery Time for Reset to Clock February 9, 1990 t ( REC PLH PHL V M SF00108 t ( REC PHL PLH V M SF00109 6 Product specification 74F112 ...

Page 7

... February 9, 1990 90% NEGATIVE V M PULSE 10% t THL ( TLH ( 90% POSITIVE V PULSE M 10% Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude of OUT 74F 3.0V 1.5V 7 Product specification 74F112 t AMP ( TLH ( THL ( f AMP ( rep ...

Page 8

... Philips Semiconductors Dual J-K negative edge-triggered flip-flop DIP16: plastic dual in-line package; 16 leads (300 mil) 1990 Feb 09 8 Product specification 74F112 SOT38-4 ...

Page 9

... Philips Semiconductors Dual J-K negative edge-triggered flip-flop SO16: plastic small outline package; 16 leads; body width 3.9 mm 1990 Feb 09 9 Product specification 74F112 SOT109-1 ...

Page 10

... Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors yyyy mmm dd [1] Copyright Philips Electronics North America Corporation 1998 print code Document order number: 10 Product specification 74F112 All rights reserved. Printed in U.S.A. Date of release: 10-98 9397-750-05071 ...

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