SCC2698B Philips Semiconductors, SCC2698B Datasheet
SCC2698B
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SCC2698B Summary of contents
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... SCC2698B Enhanced octal universal asynchronous receiver/transmitter (Octal UART) Product specification Supersedes data of 1998 Sep 04 hilips Semiconductors INTEGRATED CIRCUITS 2000 Jan 31 ...
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... The Octal UART is fully TTL compatible and operates from a single +5V power supply. The SCC2698B is an upwardly compatible version of the 2698A Octal UART. In PLCC packaging enhanced by the addition of receiver ready or FIFO full status outputs, and transmitter empty status outputs for each channel on 16 multipurpose I/O pins ...
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... MPP1a 42 MPOh MPP1b 41 Test input MPP2a 40 MPOf 39 TxDf 38 MPOd 37 TxDd 36 INTRDN 35 INTRCN MPOb Figure 1. Pin Configurations 3 Product specification SCC2698B PLCC Pin Function Pin Function RxDd 30 MPP2b 58 RxDf RxDh MPI1e 33 MPI0a 61 MPI0e ...
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... AS A) BLOCK C (SAME AS A) BLOCK D (SAME AS A) 2000 Jan 31 INTERNAL DATA BUS TIMING CONTROL TIMING LOGIC Figure 2. Block Diagram 4 Product specification SCC2698B BLOCK A CHANNEL A TRANSMIT HOLD REGISTER TxDA TRANSMIT SHIFT REGISTER RECEIVE HOLD REGISTER (3) RxDA RECEIVE SHIFT REGISTER MR1 ...
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... Multi-Purpose Input 0: This pin (one in each UART) is programmable. Its state can always be read through the IPCR bit 0, or the IPR bit 0. CTSN: By programming MR2[ this input controls the clear-to-send function for the transmitter active low. This pin is provided with a change-of-state detector. 5 Product specification SCC2698B ...
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... Crystal Clock The crystal oscillator operates directly from a 3.6864MHz crystal connected across the X1/ CLK and X2 inputs with a minimum of external components external clock of the appropriate frequency is available, it may be connected to X1/CLK external 6 Product specification SCC2698B ...
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... Mode register 2. See Table 5 for BRG Test frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692, SCC68681 and SCC2698B” Philips Semiconductors ICs for Data Communications, IC-19, 1994. BRG The baud rate generator operates from the oscillator or external clock input and is capable of generating 26 commonly used data communications baud rates ranging from 50 to 115 ...
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... The receiver looks for a High–to–Low (mark–to–space) transition of the start bit on the RxD input pin transition is detected, the state of the RxD pin is sampled each 16X clock for 7–1/2 clocks (16X clock mode the next rising edge of 8 Product specification SCC2698B ...
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... FIFO is full. When a FIFO position becomes available, the RTSN output will be re–asserted automati- cally. This feature can be used to prevent an overrun, in the receiv- er, by connecting the RTSN output to the CTSN input of the transmitting device. 9 Product specification SCC2698B th has been the 5 ...
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... CTS (Clear To Send) is usually meant signal to the transmit- ter meaning that it may transmit data to the receiver. The CTS input is on pin MPI0 for the transmitter. The CTS signal is active low; thus called CTSN. RTS is usually meant signal from the 10 Product specification SCC2698B ...
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... MULTI-PURPOSE OUTPUT PIN This pin can be programmed to serve as a request-to-send output, the counter/timer output, the output for the 1X or 16X transmitter or receiver clocks, the TxRDY output or the RxRDY/FFULL output (see OPCR [2:0] and OPCR [6:4] – MPO Output Select). 11 Product specification SCC2698B ...
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... RxRDY), and the transmitter is enabled, the transmitter will remain in autoecho mode until the entire stop bit has been retransmitted. 12 Product specification SCC2698B ...
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... Yes 1 = Yes 2 = 0.688 3 = 0.750 Disable Yes Overrun Error TxEMT Yes 1 = Yes 1 = Yes 13 Product specification SCC2698B Bit 2 Bit 1 Bit 0 Parity Type Bits per Character 0 = Even Odd Stop Bit Length 0.813 8 = 1.563 C = 1.813 5 = 0.875 ...
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... See Table 5 for BRG Test frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692, SCC68681 and SCC2698B” Philips Semiconductors ICs for Data Communications, IC-19, 1994. OPCR (Output Port Configuration Register) This register controls the MPP I/O pins and the MPO multi-purpose output pins. ...
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... Used in character mode to clear OE status (although RB, PE, and FE bits will also be cleared), and in block mode to clear all error status after a block of data has been received. 15 Product specification SCC2698B ACR[ 110 38.4k 150 300 ...
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... This bit indicates that a character has been received and is waiting in the FIFO to be read by the CPU set when the character is transferred from the receive shift register to the FIFO and reset when the CPU reads the RHR, and no more characters are in the FIFO. 16 Product specification SCC2698B ...
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... IMR is also a ‘1’, the INTRN output is asserted (Low). If the corresponding bit in the IMR is a zero, the state of the bit in the ISR has no effect on the INTRN output. Note that the IMR does not mask the reading of the ISR; the true status is provided regardless of the contents of the IMR. 17 Product specification SCC2698B ...
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... However, note that a subsequent start counter command will cause the counter to begin a new count cycle using the values in CTPU and CTPL. 18 Product specification SCC2698B ...
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... GND open open 50pF 2. Test conditions for rest of outputs Product specification SCC2698B LIMITS UNIT UNIT Min Typ Max 0.8 V 2 0 – – –100 A ...
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... RxD data setup time to RxC high RXS t 11 RxD data hold time from RxC high RXH 2000 Jan + 5.0 V 10%, – PARAMETER PARAMETER 10 20 Product specification SCC2698B LIMITS UNIT UNIT Min Typ Max 200 100 ...
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... FLOAT (READ) WRN D0–D7 (WRITE) 2000 Jan 31 2.7K 60pF 6K 150pF Figure 4. Test Conditions on Outputs t RES Figure 5. Reset Timing RWD NOT VALID VALID t RWD VALID Figure 6. Bus Timing 21 Product specification SCC2698B +5V +5V 1.6K SD00187 SD00169 FLOAT SD00188 ...
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... AND CAN GREATLY AFFECT THE RESULTANT MEASUREMENT. 2000 Jan OLD DATA Figure 7. Port Timing POINT 0.5V ABOVE V . THIS POINT REPRESENTS NOISE MARGIN THAT AS Figure 8. Interrupt Timing 22 Product specification SCC2698B NEW DATA SD00189 V +0. +0. SD00190 ...
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... TO 150 K X2 3.6864MHz 4pF TYPICAL CRYSTAL SPECIFICATION 2 – 4MHZ ): 12 – 32pF L PARALLEL RESONANT, FUNDAMENTAL MODE Figure 9. Clock Timing 1 BIT TIME ( CLOCKS) t TXD TxD t TCS Figure 10. Transmit Timing 23 Product specification SCC2698B + INTERNAL CLOCK DRIVERS SD00137 SD00146 ...
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... RTSN (MPO) CR[7:4] = 1010 NOTES: 1. TIMING SHOWN FOR MR2[ TIMING SHOWN FOR MR2[ 2000 Jan RXS RXH Figure 11. Receive Timing D2 D3 BREAK D3 START D4 STOP BREAK BREAK Figure 12. Transmitter Timing 24 Product specification SCC2698B SD00192 WILL D6 NOT BE TRANSMITTED CR[7:4] = 1010 SD00128 ...
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... Jan STATUS D = DATA D5 WILL BE LOST Figure 13. Receiver Timing BIT MR1[ ADD#2 BIT 9 BIT 9 ADD ADD#1 D0 Figure 14. Wake-Up Mode 25 Product specification SCC2698B RESET BY COMMAND BIT 9 ADD#2 1 BIT 9 BIT 9 ADD STATUS D ...
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... Time out periods can be enabled using the counter/timer in the SCC2691, SCC2692, SCC2698B and SC68692 products. This monitoring can indicate a potential start bit corruption problem. 2000 Jan 31 ...
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... Philips Semiconductors www.DataSheet4U.com Enhanced octal universal asynchronous receiver/transmitter (Octal UART) PLCC84: plastic leaded chip carrier; 84 leads; pedestal 2000 Jan 31 27 Product specification SCC2698B SOT189-3 ...
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... Philips Semiconductors www.DataSheet4U.com Enhanced octal universal asynchronous receiver/transmitter (Octal UART) 2000 Jan 31 NOTES 28 Product specification SCC2698B ...
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... Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 hilips Semiconductors 2000 Jan 31 [1] Copyright Philips Electronics North America Corporation 2000 Document order number: 29 Product specification SCC2698B All rights reserved. Printed in U.S.A. Date of release: 01-00 9397 750 06828 ...