MC74HC4020ADG ON Semiconductor, MC74HC4020ADG Datasheet

IC COUNTER 14STAGE BIN 16-SOIC

MC74HC4020ADG

Manufacturer Part Number
MC74HC4020ADG
Description
IC COUNTER 14STAGE BIN 16-SOIC
Manufacturer
ON Semiconductor
Series
74HCr
Datasheet

Specifications of MC74HC4020ADG

Logic Type
Binary Counter
Direction
Up
Number Of Elements
1
Number Of Bits Per Element
14
Reset
Asynchronous
Count Rate
50MHz
Trigger Type
Negative Edge
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Counter Type
Binary
Counting Sequence
Up
Number Of Circuits
1
Logic Family
74HC
Propagation Delay Time
96 ns, 63 ns, 31 ns, 25 ns
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Function
Counter
Mounting Style
SMD/SMT
Operating Supply Voltage
2 V to 6 V
Rohs Compliant
YES
Timing
-
Clock Frequency
50MHz
Count Maximum
16383
Supply Voltage Range
2V To 6V
Logic Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-55°C To +125°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Timing
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74HC4020ADG
Manufacturer:
ON Semiconductor
Quantity:
1 916
MC74HC4020A
14-Stage Binary Ripple
Counter
High−Performance Silicon−Gate CMOS
MC14020B. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LSTTL
outputs.
brought out to pins. The output of each flip−flop feeds the next and the
frequency at each output is half of that of the preceding one. Reset is
asynchronous and active−high.
of internal ripple delays. Therefore, decoded output signals are subject
to decoding spikes and may have to be gated with the Clock of the
HC4020A for some designs.
Features
© Semiconductor Components Industries, LLC, 2010
March, 2010 − Rev. 6
The MC74C4020A is identical in pinout to the standard CMOS
This device consists of 14 master−slave flip−flops with 12 stages
State changes of the Q outputs do not occur simultaneously because
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With JEDEC Standard No. 7A Requirements
Chip Complexity: 398 FETs or 99.5 Equivalent Gates
Pb−Free Packages are Available
1
6
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
16
16
16
1
A =
L, WL = Wafer Lot
Y, YY = Year
W, WW =Work Week
G or G
(Note: Microdot may be in either location)
1
1
1
ORDERING INFORMATION
http://onsemi.com
Assembly Location
= Pb−Free Package
CASE 751B
CASE 948F
SOEIAJ−16
TSSOP−16
DT SUFFIX
CASE 648
CASE 966
N SUFFIX
D SUFFIX
F SUFFIX
PDIP−16
SOIC−16
Publication Order Number:
16
16
1
1
16
1
MC74HC4020AN
MC74HC4020A/D
16
DIAGRAMS
AWLYYWWG
1
MARKING
HC4020AG
74HC4020A
AWLYWW
ALYWG
ALYWG
HC40
20A
G

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MC74HC4020ADG Summary of contents

Page 1

MC74HC4020A 14-Stage Binary Ripple Counter High−Performance Silicon−Gate CMOS The MC74C4020A is identical in pinout to the standard CMOS MC14020B. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists ...

Page 2

... Pin Reset Pin 8 = GND Figure 1. Logic Diagram ORDERING INFORMATION Device MC74HC4020AN MC74HC4020ANG MC74HC4020AD MC74HC4020ADG MC74HC4020ADR2 MC74HC4020ADR2G MC74HC4020ADTR2 MC74HC4020ADTR2G MC74HC4020AF MC74HC4020AFG MC74HC4020AFEL MC74HC4020AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...

Page 3

... Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Î Î Î Î ...

Page 4

DC CHARACTERISTICS (Voltages Referenced to GND) Symbol Parameter V Minimum High−Level Input Voltage IH V Maximum Low−Level Input Voltage IL V Minimum High−Level Output Voltage OH V Maximum Low−Level Output Voltage OL I Maximum Input Leakage Current in I Maximum ...

Page 5

AC CHARACTERISTICS ( pF, Input t L Symbol f Maximum Clock Frequency (50% Duty Cycle) max (Figures 1 and Maximum Propagation Delay, Clock to Q1* PLH t (Figures 1 and 4) PHL t Maximum Propagation ...

Page 6

... Maximum Input Rise and Fall Times r f (Figure 1) NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). INPUTS Clock (Pin 10) Negative−edge triggering clock input. A high−to−low transition on this input advances the state of the counter. ...

Page 7

Qn 50% t PLH Qn+1 50% Figure Clock Reset Q6 = Pin Pin Pin 13 SWITCHING WAVEFORMS (continued GND t PHL Q4 Q5 ...

Page 8

Clock Reset Q10 Q12 Q13 Q14 Time−Base Generator A 60Hz sinewave obtained through a 1.0 Megohm resistor connected directly to a standard 120 Vac power line is applied to the ...

Page 9

−T− 0.25 (0.010 PACKAGE DIMENSIONS PDIP−16 N SUFFIX CASE 648−08 ISSUE T L SEATING PLANE http://onsemi.com 9 NOTES: 1. ...

Page 10

... G K −T− SEATING PLANE 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −B− 0.25 (0.010 SOLDERING FOOTPRINT 8X 6 ...

Page 11

... −V− C 0.10 (0.004) −T− SEATING D PLANE 16X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−16 CASE 948F−01 ISSUE É É É ...

Page 12

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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