L60NH3LL STMicroelectronics, L60NH3LL Datasheet

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L60NH3LL

Manufacturer Part Number
L60NH3LL
Description
N-channel 30V - 0.0065ohm - 30A - PowerFLAT (6x5) Ultra low gate charge STripFET Power MOSFET
Manufacturer
STMicroelectronics
Datasheet

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L60NH3LL
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General features
Description
This application specific Power MOSFET is the
latest generation of STMicroelectronics unique
“STripFET™” technology. The resulting transistor
is optimized for low on-resistance and minimal
gate charge. The Chip-scaled PowerFLAT™
package allows a significant board space saving,
still boosting the performance.
Applications
September 2006
Order codes
STL60NH3LL
Improved die-to-footprint ratio
Very low profile package (1mm max)
Very low thermal resistance
Very low gate charge
Low threshold device
Switching application
Type
STL60NH3LL
Part number
V
30V
N-channel 30V - 0.0065Ω - 30A - PowerFLAT™ (6x5)
DSS
Ultra low gate charge STripFET™ Power MOSFET
<0.0085Ω
R
DS(on)
L60NH3LL
Marking
16A
I
D
(2)
Rev 5
Internal schematic diagram
PowerFLAT™ (6 x 5)
Package
PowerFLAT™(6x5)
STL60NH3LL
Packaging
Tape & reel
www.st.com
1/13
13

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L60NH3LL Summary of contents

Page 1

... Applications ■ Switching application Order codes Part number STL60NH3LL September 2006 R I DS(on) D (2) <0.0085Ω 16A Internal schematic diagram Marking L60NH3LL PowerFLAT™ Rev 5 STL60NH3LL PowerFLAT™(6x5) Package Packaging Tape & reel 1/13 www.st.com 13 ...

Page 2

... Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/ STL60NH3LL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ...

Page 3

... STL60NH3LL 1 Electrical ratings Table 1. Absolute maximum ratings Symbol V Drain-source voltage ( Gate-source voltage GS (1) I Drain current (continuous (1) I Drain current (continuous (2) I Drain current (continuous (3) I Drain current (pulsed) DM (1) P Total dissipation at T TOT (2) P Total dissipation at T TOT ...

Page 4

... 10V 4.5V Parameter Test condictions V =25V 1MHz 15V 4.5V GS (see Figure 15) f=1 MHz Gate DC Bias = 0 Test signal level = 20mV open drain STL60NH3LL Min. Typ 250µ 0.0065 0.0085 0.0075 0.0105 D Min. Typ. Max. 1810 =0 565 ...

Page 5

... STL60NH3LL Table 5. Switching times Symbol t Turn-on delay time d(on) t Rise time r t Turn-off delay time d(off) t Fall time f Table 6. Source drain diode Symbol I Source-drain current SD I Source-drain current (pulsed) SDM (1) V Forward on voltage SD t Reverse recovery time rr Q Reverse recovery charge rr I Reverse recovery current RRM 1. Pulsed: Pulse duration = 300µ ...

Page 6

... Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 3. Output characterisics Figure 5. Normalized B VDSS 6/13 Figure 2. Figure 4. vs temperature Figure 6. STL60NH3LL Thermal impedance Transfer characteristics Static drain-source on resistance ...

Page 7

... STL60NH3LL Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics Electrical characteristics Capacitance variations Figure 10. Normalized on resistance vs temperature 7/13 ...

Page 8

... The previous curve gives the single pulse safe operating area for unclamped inductive loads under the following conditions: P =0.5*(1.3*BV D(AVE AS(AR) D(AVE) Where the allowable current in avalanche the average power dissipation in avalanche (single pulse) D(AVE the time in avalanche AV 8/ DSS STL60NH3LL ...

Page 9

... STL60NH3LL 3 Test circuit Figure 14. Switching times test circuit for resistive load Figure 16. Test circuit for inductive load switching and diode recovery times Figure 18. Unclamped inductive waveform Figure 15. Gate charge test circuit Figure 17. Unclamped inductive load test circuit Figure 19. Switching time waveform ...

Page 10

... These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at: 10/13 www.st.com STL60NH3LL ...

Page 11

... STL60NH3LL DIM PowerFLAT™ (6x5) MECHANICAL DATA mm. MIN. TYP MAX. 0.80 0.83 0.93 0.02 0.05 0.20 0.35 0.40 0.47 5.00 4.75 4.15 4.20 4.25 6.00 5.75 3.43 3.48 3.53 2.58 2.63 2.68 1.27 0.70 0.80 0.90 Package mechanical data inch MIN. TYP. MAX. 0.031 0.032 0.036 0.0007 0.0019 0.007 0.013 0.015 0.018 0.196 0.187 0.163 0.165 0.167 0.236 0.226 0.135 0.137 ...

Page 12

... Revision history 5 Revision history Table 7. Revision history Date 10-Jan-2006 14-Apr-2006 03-Jul-2006 01-Aug-2006 05-Sep-2006 12/13 Revision 1 First release 2 New footprint 3 New Ecopack label 4 Modified Figure 1. and 5 New template, no content change STL60NH3LL Changes Figure 2. ...

Page 13

... STL60NH3LL Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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