SG6905 Fairchild Semiconductor, SG6905 Datasheet - Page 17

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SG6905

Manufacturer Part Number
SG6905
Description
Manufacturer
Fairchild Semiconductor
Datasheet

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Manufacturer
Quantity
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Part Number:
SG6905SZ
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Green mode PFC/Flyback-PWM Controller
Multi-vector Error Amplifier
Although the PFC stage has a low bandwidth voltage loop
for better input power factor, the innovative Multi-Vector
Error Amplifier provides a fast transient response to
clamp the overshoot and undershoot of the PFC output
voltage.
Figure 5 shows the block diagram of the multi-vector
error amplifier. When the variation of the feedback
voltage exceeds ± 5% of the reference voltage, the
trans-conductance error amplifier will adjust its output
impedance to increase the loop response. Either R
is opened, OPFC of SG6905 will shut off immediately to
prevent extra-high voltage on the output capacitor.
FIG. 5 Multi-vector error amplifier
Cycle-by-Cycle Current Limiting
SG6905 provides cycle-by-cycle current limiting for both
PFC and PWM stages. Figure 6 shows the peak current
limit for the PFC stage. The PFC gate drive is terminated
once the voltage on ISENSE pin goes below V
The voltage of V
relationship between V
Figure 6.
The amplitude of the constant current I
the internal current reference according to the following
equation:
© System General Corp.
Version 1.1.1 (IAO33.0060.B1)
I
P
=
2
×
1.2V
R
I
RMS
---------------------
determines the voltage of V
PK
and V
RMS
P
is also shown in
is determined by
PK
.
A
PK
or R
. The
(7)
B
- 17 -
The peak current of the I
Flyback PWM and Slope Compensation
As shown in Figure 7, peak-current-mode control is
utilized for Flyback PWM. The SG6905 inserts a
synchronized 0.5V ramp at the beginning of each
switching cycle. This built-in slope compensation ensures
stable operation for continuous current-mode operation.
When the IPWM voltage, across the sense resistor,
reaches the threshold voltage (0.9V), the OPWM will be
turned off after a small propagation delay t
To improve stability or prevent sub-harmonic oscillation,
a synchronized positive-going ramp in inserted at every
switching cycle.
FIG. 7 Peak current control loop
I
SENSE_peak
FIG. 6 VRMS controlled current limiting
www.sg.com.t w • www.fairchildsemi.com
=
(I
P
×
R
R
P
SENSE
- )
S
0.2V
is given by (V
Product Specification
------------------
September 27, 2007
PD-PWM
RMS
SG6905
<1.05V):
.
(8)

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