TDA1313T Philips Semiconductors, TDA1313T Datasheet - Page 5

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TDA1313T

Manufacturer Part Number
TDA1313T
Description
Stereo continuous calibration DAC CC-DAC
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
PINNING
FUNCTIONAL DESCRIPTION
The basic operation of the continuous calibration DAC is
illustrated in Fig.3. The figure shows the calibration and
operation cycle. During calibration of the MOS current
source (Fig.3a) transistor M1 is connected as a diode by
applying a reference current. The voltage V
intrinsic gate-source capacitance C
determined by the transistor characteristics. After
calibration of the drain current to the reference value I
the switch S1 is opened and S2 is switched to the other
position (Fig.3b). The gate-to-source voltage V
not changed because the charge on C
Therefore, the drain current of M1 will still be equal to I
and this exact duplicate of I
terminal.
In the TDA1313; 1313T, 32 current sources and one spare
current source are continuously calibrated (see Fig.1).
The spare current source is included to allow continuous
July 1993
LRSEL/RSI
SI/LSI
4/8FSSEL
V
V
V
RIN
ROUT
LOUT
LIN
V
V
V
V
WS
BCK
REF
SSO
DDO
DDA
SSA
SSD
DDD
Stereo continuous calibration DAC
(CC-DAC)
SYMBOL
PIN
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
left/right select; right serial
input
serial input; left serial input
4/8 oversampling select
reference voltage output
operational amplifier ground
operational amplifier supply
voltage
right analog input
right analog output
left analog output
left analog input
analog supply voltage
analog ground
digital ground
digital supply voltage
word select
bit clock input
REF
is now available at the I
DESCRIPTION
gs
of M1 is then
gs
is preserved.
gs
on the
gs
of M1 is
REF
REF
O
,
5
converter operation. The output of one calibrated source is
connected to an 11-bit binary current devider which
consists of 2048 transistors. A symmetrical offset
decoding principle is incorporated and arranges the bit
switching in such a way that the zero-crossing is
performed by switching only the LSB currents.
The TDA1313; T (CC-DAC) accepts serial input data
format of 16 bit word length. The most significant bit (bit 1)
must always be first. The timing is illustrated in Fig.4 and
the input data formats are illustrated in Figs 5 and 6.
Data is placed in the right and left input registers (Fig.1).
The data in the input registers is simultaneously latched to
the output registers which control the bit switches.
V
Where: V
handbook, halfpage
REF
and V
DD1
LRSEL/RSI
4/8FSSEL
FS
/V
V DDO
V SSO
ROUT
SI/LSI
V REF
are proportional to V
DD2
RIN
Fig.2 Pin configuration.
= V
1
2
3
4
5
6
7
8
FS1
TDA1313; TDA1313T
TDA1313T
TDA1313
/V = V
MGE229
REF1
DD
Objective specification
16
15
14
13
12
11
10
9
/V
.
REF2
BCK
WS
V DDD
V SSD
V SSA
V DDA
LIN
LOUT

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