TDA7326 ST Microelectronics, TDA7326 Datasheet

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TDA7326

Manufacturer Part Number
TDA7326
Description
AM-FM RADIO FREQUENCY SYNTHESIZER
Manufacturer
ST Microelectronics
Datasheet

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TDA7326D
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TDA7326D
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BLOCK DIAGRAM
July 1994
FM INPUT AND PRECOUNTER FOR UP TO
140MHz
AM INPUT FOR UP TO 40MHz
6-BIT SWALLOW COUNTER, 8-BIT PRO-
GRAMMABLE COUNTER FOR FM AND SW
14-BIT PROGRAMMABLE COUNTER FOR
LW AND MW
THREE WIRES 8-BIT SERIAL INTERFACE
ON-CHIP REFERENCE OSCILLATOR AND
COUNTER
PROGRAMMABLE SCANNING STEPS FOR
AM AND FM
DIGITAL PHASE DETECTOR AND LOOP FIL-
TER
TWO SEPARATE FREE PROGRAMMABLE
FILTER APPLICATIONS AVAILABLE
TUNING VOLTAGE OUTPUT 0.5 TO 9.5V
PROGRAMMABLE CURRENT SOURCES TO
SET THE LOOP GAIN
ON-CHIP POWER ON RESET
STANDBY MODE
AM-FM RADIO FREQUENCY SYNTHESIZER
DESCRIPTION
The TDA7326 is a PLL frequency synthesizer in
CMOS technology that performs all the function of
a PLL radio tuning system for FM and AM (LW,
MW, SW)
ORDERING NUMBERS: TDA7326 (DIP16)
TDA7326D (SO16W)
TDA7326
SO16W
DIP16
1/16

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TDA7326 Summary of contents

Page 1

... ON-CHIP POWER ON RESET STANDBY MODE BLOCK DIAGRAM July 1994 TDA7326 SO16W ORDERING NUMBERS: TDA7326 (DIP16) TDA7326D (SO16W) DESCRIPTION The TDA7326 is a PLL frequency synthesizer in CMOS technology that performs all the function of a PLL radio tuning system for FM and AM (LW, MW, SW) DIP16 1/16 ...

Page 2

... TDA7326 ABSOLUTE MAXIMUM RATINGS Symbol Supply Voltage DD1 Supply Voltage DD2 SS V Input Voltage IN V Output Voltage OUT I Input Current IN I Output Current OUT T Storage Temperature stg T Ambient Temperature A PIN CONNECTION THERMAL DATA Symbol R Thermal Resistance Junction-ambient th j-amb Figure 1:Input Sensitivity ...

Page 3

... Direct Mode 0.6 to 16MHz (Sinus) Swallow Mode 16 to 40MHz (Sinus 120MHz (Sinus) fin = 120MHz fin = 12MHz Euro-Quartz ITT = PIN 15,16) VIN = V ; Phase Detector SS Output = Tristate VIN = V ; Phase Detector DD Output = Tristate TDA7326 = 4MHz 68K ; OSC ISET Min. Typ. Max. Unit 4.5 5.0 5.5 V 9.0 10 ...

Page 4

... TDA7326 ELECTRICAL CHARACTERISTICS (continued) LOOP FILTER OUTPUT (LP = PIN 14) OUT Symbol Parameter v Output Voltage Low OL V Output Voltage High OH CHARGE PUMP CURRENT GENERATION (LP I Sink Current LPIN1 Source Current LPIN1,2 so DOUT1 OPENDRAIN OUTPUT(PIN 9) v Output Voltage Low OL BUS INTERFACE -I Input Leakage Current ...

Page 5

... BIT 5 BIT 4 BIT 3 BIT 2 data 0 data 1 data 2 data 3 test 0 test 1 test 2 SOUT PC7 PC6 LPF1/2 CURR 1 PC5 PC4 PC3 SC5 SC4 SC3 FUNCTION , PF1 PF2 TDA7326 BIT 1 LSB BIT 0 data 4 data 5 CURR2 f REF SWM/DIR AM/FM PC2 PC1 PC0 SC2 SC1 SC0 5/16 ...

Page 6

... TDA7326 3.3 DIVIDER FROM V FREQUENCY TO CO REFERENCE FREQUENCY This divider provides a low frequency f is phase compared with the reference frequency f . REF 3.4 OPERATING MODE Four operating modes are available mode swallow mode direct mode, - Standby mode They are user programmable with the SWR/DIR and AM/FM bits in the byte 2 ...

Page 7

... Reference frequency divider range is select- able by the programming bit ’f REF Available reference frequency are shown in following table. Figure 4: Phase comparator fref PREDIVIDER R fsyn MSB REGISTER REGISTER PC7 .. PC0 SC5 .. SC0 COUNTER : C D94AU102 TABLE 3.4 AM/ ’ TDA7326 (kHz) REF REF 0 12 2.5 7/16 ...

Page 8

... TDA7326 Figure 5 8/16 ...

Page 9

... PLL device and p systems. A bus control system check the format of transmission, only eight bit word transmission is allowed. Four registers with 6 bit are user programmable. The selection of this four registers is controlled by two address bits. TDA7326 in- REF Test Function PIN 7 (OSCIN) (appl. mode) O (appl ...

Page 10

... TDA7326 4.0 BIT ORGANIZATION OF THE BUS TRANSFER OPERATION Loading registers for all bytes of the programmable counters and all control registers LPF1 PC7 PC6 CURR1 LPF2 SC5 1 1 SC4 SC3 (0)* Loading registers for all bytes of the programmable counters and all control registers ...

Page 11

... NOTE: (*) The bit SC5 is FORCED = 0, and higher weigth bits are left shift ed one position. REF swallow 6bit REF REF swallow 5bit (bit SC5 = 0) REF REF = 25KHz 10.7MHz 25KHz 10.7MHz TDA7326 (*) binary PC = 135 (*) 0 binary PC = 135 11/16 ...

Page 12

... TDA7326 c) CONDITIONS: FM MODE (f = 98.8MHz REF it follows 98.8 + 10.7 = 109.5MHz VCO DIV_VAL = 8760 - 64 = 8696 = 21 F8 Hex PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 SC5 SC4 SC3 SC2 SC1 SC0 d) CONDITIONS: AM DIRECT MODE 530KHz follows 530 + 450 = 980KHz VCO ...

Page 13

... Figure 5: Application with two loop-filters *) C7 must be connected as closed as possible between pin 10 and pin 13 Figure 6: PC Board and Component Layout of fig. 5 TDA7326 13/16 ...

Page 14

... TDA7326 DIP16 PACKAGE MECHANICAL DATA DIM. MIN. TYP. a1 0. 2.54 e3 17. 14/16 mm MAX. MIN. 0.020 1.65 0.030 0.5 20 8.5 7.1 5.1 3.3 1.27 inch TYP. MAX. 0.065 0.020 0.010 0.787 0.335 0.100 0.700 0.280 0.201 0.130 0.050 ...

Page 15

... SO16 PACKAGE MECHANICAL DATA DIM. MIN. TYP 0 0. 10.1 E 10.0 e 1.27 e3 8.89 F 7 MAX. MIN. 2.65 0.2 0.004 2.45 0.49 0.014 0.32 0.009 0.5 45 (typ.) 10.5 0.398 10.65 0.394 7.6 0.291 1.27 0.020 0.75 8 (max.) TDA7326 inch TYP. MAX. 0.104 0.012 0.096 0.019 0.013 0.020 0.413 0.419 0.050 0.350 0.299 0.050 0.030 15/16 ...

Page 16

... TDA7326 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men- tioned in this publication are subject to change without notice ...

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