MCP601-I-SN N/A, MCP601-I-SN Datasheet - Page 11

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MCP601-I-SN

Manufacturer Part Number
MCP601-I-SN
Description
2.7V to 5.5V Single Supply CMOS Op Amps
Manufacturer
N/A
Datasheet
The maximum operating common-mode voltage that
can be applied to the inputs is V
In contrast, the absolute maximum input voltage is V
- 0.3V and V
exceed this absolute maximum rating can cause exces-
sive current to flow in or out of the input pins. Current
beyond ±2mA can cause possible reliability problems.
Applications that exceed this rating must be externally
limited with an input resistor as shown in Figure 3-3.
FIGURE 3-3:
Absolute Maximum Specifications, an input resistor,
R
pin.
3.3
Driving capacitive loads can cause stability problems
with many of the higher speed amplifiers.
For any closed loop amplifier circuit, a good rule of
thumb is to design for a phase margin that is no less
than 45
ever, if the phase margin is lower, layout parasitics can
degrade the phase margin further causing a truly
unstable circuit. A system phase shift of 45
an overshoot in its step response of approximately
25%.
A buffer configuration with a capacitive load is the most
difficult configuration for an amplifier to maintain stabil-
ity. The Phase versus Capacitive Load of the MCP60X
amplifier is shown in Figure 3-4. In this figure, it can be
seen that the amplifier has a phase margin above 40
while driving capacitance loads up to 100pF.
 2000 Microchip Technology Inc.
R
or
(V
IN
IN
SS
, should be used to limit the current flow into that
= (Maximum expected voltage - V
- Minimum expected voltage)/ 2mA.
°
. This is a conservative theoretical value, how-
Capacitive Load and Stability
R
DD
IN
If the inputs of the amplifier exceed the
+ 0.3V. Voltages on the input that
MCP60X
SS
- 0.3V to V
DD
) / 2mA
°
DD
will have
- 1.2V.
SS
°,
FIGURE 3-4:
Capacitive Load
FIGURE 3-5:
when driving heavy capacitive loads.
If the amplifier is required to drive larger capacitive
loads, the circuit shown in Figure 3-5 can be used. A
small series resistor (R
improves the phase margin when driving large capaci-
tive loads. This resistor decouples the capacitive load
from the amplifier by introducing a zero in the transfer
function.
This zero adjusts the phase margin by approximately:
where:
MCP601/602/603/604
∆θ
GBWP is the gain bandwidth product of the
amplifier,
R
C
V
3.5
2.5
1.5
0.5
ISO
L
IN
m
4
3
2
1
0
is the load capacitance
10
10
is the improvement in phase margin,
is the capacitive decoupling resistor, and
∆θ
Phase
Margin
m
MCP60X
= tan
100
100
Gain Bandwidth, Phase Margin vs.
Amplifier circuits that can be used
Gain-Bandwidth
-1
V
Capacitance (pF)
DD
(2π GBWP x R
1000
ISO
1E3
) at the output of the amplifier
10000
10E3
R
ISO
ISO
V
R
100000
100E3
DS21314D-page 11
DD
L
=100 k Ω
=5.0V,
x C
C
L
1000000
L
)
V
1E6
OUT
80
70
60
50
40
30
20
10
0

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