TDA9981A Philips Semiconductors, TDA9981A Datasheet

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TDA9981A

Manufacturer Part Number
TDA9981A
Description
HDMI Transmitter Up To 150 MHz Pixel Rate
Manufacturer
Philips Semiconductors
Datasheet

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1. General description
2. Features
The TDA9981A is an HDMI transmitter (which also supports DVI) that enables a 3
RGB or YC
version), up to 4 I
the additional information required by all the HDMI 1.2a standards.
In order to be compatible with most applications, the TDA9981A integrates a full
programmable input formatter and color space conversion block. The video input formats
accepted are YC
2
For ITU656-like formats, double edges are supported so that data can be sampled on
rising and falling edges.
The TDA9981A also includes a HDCP 1.1-compliant cipher block. The HDCP key set is
stored internally in a One Time Programmable (OTP) non-volatile memory for maximum
security.
The device can be controlled via an I
TDA9981A
HDMI transmitter up to 150 MHz pixel rate with 3
inputs and 4
Rev. 01 — 19 May 2008
3
Horizontal synchronization, vertical synchronization and Data Enable (DE) inputs or
VREF, HREF and FREF could be used for input data synchronization
Pixel rate clock input can be made active on one or both edges (selectable by I
The TDA9981A has 4 I
sampling rate up to 192 kHz
250 MHz to 1.50 GHz HDMI transmitter operation
Programmable input formatter and upsampler/interpolator allows input of any of the
4 : 4 : 4, 4 : 2 : 2 semi-planar, 4 : 2 : 2 ITU656 and ITU656-like formats
Programmable color space converter:
Deals with multiple levels of HDCP receivers and repeaters
Internal SHA-1 calculation
Controllable via I
Low power dissipation
12-bit), YC
RGB to YC
YC
8-bit video data input bus, CMOS and LV-TTL compatible
B
C
B
C
R
R
B
to RGB
C
video stream (with a pixel rate up to 150 MHz for the TDA9981AHL/15
B
R
2
C
B
S-bus audio streams (with an audio sampling rate up to 192 kHz) and
4 : 2 : 2 compliant with ITU656 and ITU656-like (up to 1
C
R
2
R
C-bus
4 : 4 : 4 (up to 3
I
2
S-bus with S/PDIF
2
S-bus audio input channels and 1 S/PDIF channel; audio
2
C-bus interface.
8-bit), YC
B
C
R
4 : 2 : 2 semi-planar (up to
Product data sheet
8-bit video
12-bit).
2
C-bus)
8-bit

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TDA9981A Summary of contents

Page 1

... YC For ITU656-like formats, double edges are supported so that data can be sampled on rising and falling edges. The TDA9981A also includes a HDCP 1.1-compliant cipher block. The HDCP key set is stored internally in a One Time Programmable (OTP) non-volatile memory for maximum security. The device can be controlled via ...

Page 2

... DDD(3V3) Typical values are measured DDC(1V8) Symbol TDA9981AHL/8 and TDA9981AHL/15 V DDA(FRO_3V3) V DDA(PLL_3V3) V DDD(3V3) V DDH(3V3) V DDC(1V8) T amb TDA9981AHL/ MHz f clk(max) P cons P tot P pd TDA9981A_1 Product data sheet Quick reference data = DDA(PLL_3V3 DDC(1V8) ...

Page 3

... NXP Semiconductors Table 1. V DDA(FRO_3V3) V DDD(3V3) Typical values are measured DDC(1V8) Symbol TDA9981AHL/15 150 MHz f clk(max) P cons P tot P pd [1] Worst case: video input format: 720p (RGB embedded sync), video output format: 720p (YC [2] Video input format: 1080p (RGB embedded sync, rising edge), video output format: 1080p (RGB ...

Page 4

... SSC SSA(FRO_3V3) SSA(PLL_3V3) SSH SSA(PLL_1V8 DDC_SCL DDC-BUS 19 DDC_SDA 17 IRQ INT GENERATION 27 TXC+ 26 OTP TXC MEMORY KEYS 30 TX0+ 29 TX0 HDMI SERIALIZER 33 TX1+ 32 TX1 HDCP 36 TX2+ 35 TX2 TDA9981A 21 24 001aah914 TM EXT_SWING ...

Page 5

... I audio port 7 input; auxiliary (AUX audio port 6 input; S/PDIF stream 6 I audio port 5 input; optional master clock MCLK for S/PDIF Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter 60 V SSC 59 V DDC(1V8) 58 VPB[6] 57 ...

Page 6

... I C-bus slave address input 1; bit C-bus slave address input 0; bit hard reset input; active LOW Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter 2 S-bus port 3 2 S-bus port 2 2 S-bus port 1 2 S-bus port 0 2 S-bus ...

Page 7

... I video port A input bit video port A input bit video port A input bit video data enable input or field reference input Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter © NXP B.V. 2008. All rights reserved ...

Page 8

... The TDA9981A has three video input ports VPA[7:0], VPB[7:0] and VPC[7:0]. The TDA9981A can reallocate and swap each of the 3 input channel ports by inverting the bus and swapping each port. The TDA9981A can be set to latch data at either the rising or falling edge or both. The video input formats accept (see • ...

Page 9

Table 5. Inputs of video input formatter Color Format Channels Sync space RGB 8-bit external external embedded embedded ...

Page 10

... RGB Pin G[0] VPC[0] G[1] VPC[1] G[2] VPC[2] G[3] VPC[3] G[4] VPC[4] G[5] VPC[5] G[6] VPC[6] G[7] VPC[ Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control RGB Pin R[0] HSYNC/HREF R[1] VSYNC/VREF R[2] DE/FREF R[3] R[4] R[5] R[6] R[7] B3 ... Bxxx Bxxx G3 ... Gxxx Gxxx R3 ... Rxxx Rxxx © NXP B.V. 2008. All rights reserved. ...

Page 11

... (rising edge) input B R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin [0] HSYNC/HREF R C [1] VSYNC/VREF R C [2] DE/FREF [4] ...

Page 12

... VPB[7] C [11] Y [11 ITU656-like external synchronization single edge (rising edge) input R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin C [4] Y [4] HSYNC/HREF used [5] Y [5] VSYNC/VREF used ...

Page 13

... VPB[7] C [11] Y [11 ITU656-like external synchronization double edge (rising and falling) input R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin C [4] Y [4] HSYNC/HREF used [5] Y [5] VSYNC/VREF used R ...

Page 14

... VPB[7] C [11 ITU656-like embedded synchronization single edge (rising edge) input R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin [4] C [4] Y [4] HSYNC/HREF not used R 1 [5] C [5] Y [5] VSYNC/VREF not used ...

Page 15

... VPB[7] C [11] Y [11 ITU656-like embedded synchronization double edge (rising and falling) R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin YC C [4] Y [4] HSYNC/HREF not used [5] Y [5] VSYNC/VREF not used ...

Page 16

... VPC[ semi-planar external synchronization (rising edge) input R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin B R semi-planar C [4] C [4] HSYNC/HREF used [5] C [5] ...

Page 17

... VPC[ semi-planar embedded synchronization (rising edge) input R Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Control Pin B R semi-planar C [4] C [4] HSYNC/HREF not used [5] C ...

Page 18

... Input and output video format Due to the flexible video input formatter, the TDA9981A can accept a large range of input formats. This flexibility allows the TDA9981A to be compatible with the maximum possible number of MPEG decoders. Moreover, these input formats may be changed in many ways (color space converter, upsampler and downsampler transmitted across the HDMI link ...

Page 19

... AP7 ACLK 8.9 S/PDIF The audio port AP6 is used for the S/PDIF feature. In this format the TDA9981A supports 2-channel uncompressed PCM data (IEC 60958) layout 0 or compressed bit stream multichannels (Dolby Digital, DTS, AC-3, etc.) layout 1. The TDA9981A is able to recover the original clock from the S/PDIF signal (no need for an external clock). In addition it can also use an external clock (MCLK) to decode the S/PDIF signal ...

Page 20

... Bcaps ready). These interrupts are maskable. Hot plug or unplug detect: pin HPD is the hot plug detection pin input tolerant. 8.13 Initialization Hard reset: after power-up, the TDA9981A is activated by a hard reset via pin RST_N. However, the TDA9981A has a power-on reset. TDA9981A_1 ...

Page 21

... OTP non-volatile memory or can be loaded via the I are stored internally, the security is maximized. 8.14.1 Repeater function The TDA9981A can be used in a repeater device according to HDCP 1.1 specification and HDMI 1.2a specification. The TDA9981A can handle devices connected downstream. 8.14.2 SHA-1 To deal with the repeater, a SHA-1 calculation is performed by the transmitter and by the downstream repeater ...

Page 22

... CEA EDID timing extension. If the 24-bit IEEE registration identifier contains the value 00 0C03h, then the receiver will support HDMI, otherwise the device will be treated as a DVI device. However, the TDA9981A does not have direct access to that information since E-EDID is read by an external microprocessor through the TDA9981A I 8 ...

Page 23

... HBM Thermal characteristics Parameter Conditions thermal resistance from junction in free air; JEDEC 4L board to ambient thermal resistance from junction to case Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter DATA STOP 001aaf292 Min Max Unit 0.5 +4.6 V 0.5 +2 ...

Page 24

... DDA(FRO_3V3) V PLL 3.3 V analog supply voltage DDA(PLL_3V3) V digital supply voltage (3.3 V) DDD(3V3) V HDMI supply voltage (3.3 V) DDH(3V3) V core supply voltage (1.8 V) DDC(1V8) TDA9981AHL/ MHz I free running oscillator 3.3 V analog supply current DDA(FRO_3V3) I PLL 3.3 V analog supply current DDA(PLL_3V3) I digital supply current (3.3 V) DDD(3V3) I HDMI supply current (3.3 V) DDH(3V3) I core supply current (1 ...

Page 25

... V DDA(FRO_3V3) DDA(PLL_3V3) DDH(3V3) Conditions single output; R ext (1 % tolerance) with test load and operating condition as in HDMI 1.2a specification Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter = DDD(3V3 3 1 DDD(3V3) DDC(1V8) Min Typ ...

Page 26

... amb = DDA(FRO_3V3) DDA(PLL_3V3) DDH(3V3) Conditions TDA9981AHL/8 TDA9981AHL/15 standard mode standard mode fast mode TDA9981AHL/8 TDA9981AHL/15 TDA9981AHL/8 TDA9981AHL/15 Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter = DDD(3V3 3 1 DDD(3V3) DDC(1V8) Min Typ ...

Page 27

... C [ [6] C [10] C [10 [7] C [11] C [11 Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter (YUV space)/B (RGB space), VPB has B [3] [ (ITU656-like) C [0] Y [ [1] Y [ ...

Page 28

... NXP Semiconductors 13.2 Example of supported video The TDA9981A supports all EIA/CEA-861B, ATSC video input formats. Table 25. Timing parameters for EIA/CEA-861B Format nr. Format 59.94 Hz systems 1 (VGA) 640 480p 2, 3 720 480p 4 1280 720p 5 1920 1080i 6, 7 (NTSC) 720 480i 8, 9 720 240p 8, 9 720 ...

Page 29

... Various systems 32 1920 1080p 32 1920 1080p 33 1920 1080p 34 1920 1080p 34 1920 1080p [1] Only for TDA9981AHL/15. Table 26. Timing parameters for PC standards below 150 MHz Standard Format 640 350p 640 400p 720 400p 0.31M3 640 480p VGA 640 480p 640 480p ...

Page 30

... Only for TDA9981AHL/15. TDA9981A_1 Product data sheet …continued V frequency H total V total (Hz) 119.989 1184 813 75.000 1600 900 59.995 1440 790 119.798 1440 813 59.870 1664 798 74 ...

Page 31

... h(D) t su( clk(H) clk( h( su(D) su(D) Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter B3 ... Bxxx Bxxx G3 ... Gxxx Gxxx R3 ... Rxxx Rxxx C 3 ... C xxx ... Yxxx Yxxx C 3 ... C xxx ...

Page 32

... h(D) t su( clk(H) clk(L) h( su(D) Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Y1 ... C xxx Yxxx © NXP B.V. 2008. All rights reserved. 001aag253 ... ... 001aag256 ...

Page 33

... HDMI 2 audio, S/PDIF and I S-bus TDA9981A IRQ C-bus I C-bus SLAVE MASTER Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter DAC CVBS/Y/(G) DENC DAC C/P /(B) B DAC P /(R) R HDMI 8 HDMI TX data stream STEREO ...

Page 34

... scale (1) ( 0.27 0.18 12.1 12.1 14.15 14.15 0.5 0.13 0.12 11.9 11.9 13.85 13.85 REFERENCES JEDEC JEITA MS-026 Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter detail ( 0.75 1.45 1 0.2 0.15 0.1 0.30 1.05 EUROPEAN PROJECTION SOT315 (1) Z ...

Page 35

... Solder bath specifications, including temperature and impurities TDA9981A_1 Product data sheet 150 MHz pixel rate HDMI transmitter Rev. 01 — 19 May 2008 TDA9981A © NXP B.V. 2008. All rights reserved ...

Page 36

... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 22. Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Figure 22) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 ...

Page 37

... Digital Versatile Disc Digital Visual Interface End of Active Video Enhanced Extended Display Identification Data Human Body Model High-bandwidth Digital Content Protection Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter peak temperature time 001aac844 © NXP B.V. 2008. All rights reserved. ...

Page 38

... NTSC and PAL systems color space originally defined by the ITU-R BT.601 R Data sheet status Product data sheet Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter Change notice Supersedes - - © NXP B.V. 2008. All rights reserved. ...

Page 39

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 19 May 2008 TDA9981A 150 MHz pixel rate HDMI transmitter © NXP B.V. 2008. All rights reserved ...

Page 40

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: TDA9981A_1 All rights reserved. Date of release: 19 May 2008 ...

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