MC54HC4353

Manufacturer Part NumberMC54HC4353
Description(MC54HC4351 / MC54HC4353) Analog Multiplexers/Demultiplexers with Address Latch
ManufacturerMotorola
MC54HC4353 datasheet
 
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Analog Multiplexers/
Demultiplexers with
Address Latch
High–Performance Silicon–Gate CMOS
The MC54/74HC4351, and MC54/74HC4353 utilize silicon–gate CMOS
technology to achieve fast propagation delays, low ON resistances, and low
OFF leakage currents. These analog multiplexers/demultiplexers control
analog voltages that may vary across the complete power supply range
(from V CC to V EE ).
The Channel–Select inputs determine which one of the Analog Inputs/
Outputs is to be connected, by means of an analog switch, to the Common
Output/Input. The data at the Channel–Select inputs may be latched by
using the active–low Latch Enable pin. When Latch Enable is high, the latch
is transparent. When either Enable 1 (active low) or Enable 2 (active high) is
inactive, all analog switches are turned off.
The Channel–Select and Enable inputs are compatible with standard
CMOS outputs; with pullup resistors, they are compatible with LSTTL
outputs.
These devices have been designed so that the ON resistance (R on ) is
more linear over input voltage than R on of metal–gate CMOS analog
switches.
For multiplexers/demultiplexers without latches, see the HC4051,
HC4052, and HC4053.
Fast Switching and Propagation Speeds
Low Crosstalk Between Switches
Diode Protection on All Inputs/Outputs
Analog Power Supply Range (V CC – V EE ) = 2.0 to 12.0 V
Digital (Control) Power Supply Range (V CC – GND) = 2.0 to 6.0 V
Improved Linearity and Lower ON Resistance than Metal–Gate Types
Low Noise
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: HC4351 — 222 FETs or 55.5 Equivalent Gates
HC4353 — 186 FETs or 46.5 Equivalent Gates
10/95
Motorola, Inc. 1995
MC54/74HC4351
MC54/74HC4353
20
1
20
1
20
1
ORDERING INFORMATION
MC54HCXXXXJ
MC74HCXXXXN
MC74HCXXXXDW
PIN ASSIGNMENT
MC54/74HC4351
X4
1
X6
2
NC
3
X
4
X7
5
X5
6
ENABLE 1
7
ENABLE 2
8
V EE
9
GND
10
NC = NO CONNECTION
1
REV 6
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
Ceramic
Plastic
SOIC
20
V CC
19
X2
18
X1
17
X0
16
X3
15
A
14
NC
13
B
12
C
LATCH
11
ENABLE

MC54HC4353 Summary of contents

  • Page 1

    ... Digital (Control) Power Supply Range (V CC – GND) = 2.0 to 6.0 V Improved Linearity and Lower ON Resistance than Metal–Gate Types Low Noise In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: HC4351 — 222 FETs or 55.5 Equivalent Gates HC4353 — 186 FETs or 46.5 Equivalent Gates 10/95 Motorola, Inc. 1995 MC54/74HC4351 MC54/74HC4353 ...

  • Page 2

    ... SWITCH ENABLE 1 8 ENABLES ENABLE 2 NOTE: This device allows independent control of each switch. Channel–Select Input A controls the X Switch, Input B controls the Y Switch, and Input C controls the Z Switch. MOTOROLA LOGIC DIAGRAM MC54/74HC4351 MULTIPLEXER/ COMMON 4 X OUTPUT/INPUT PIN PIN PIN 10 = GND ...

  • Page 3

    ... NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). High–Speed CMOS Logic Data DL129 — Rev 6 MC54/74HC4351 MC54/74HC4353 Î ...

  • Page 4

    ... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...

  • Page 5

    ... NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Î Î Î Î ...

  • Page 6

    ... INPUT VOLTAGE (VOLTS), REFERENCED Figure 1c. Typical On Resistance – 6 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12 INPUT VOLTAGE (VOLTS), REFERENCED Figure 1e. Typical On Resistance – 12.0 V MOTOROLA 100 80 125 – 1.5 1.75 2.0 2. INPUT VOLTAGE (VOLTS), REFERENCED Figure 1b. Typical On Resistance – ...

  • Page 7

    ... ANALOG I/O OFF A OFF COMMON O METER Test Set– ON/OFF COMMON O/I TEST POINT OFF/ CHANNEL SELECT Common Out, Test Set–Up MOTOROLA ...

  • Page 8

    ... PZL t PLZ ANALOG 50% OUT t PZH t PHZ ANALOG 50% OUT Figure 11a. Propagation Delay, Enable Analog Out MOTOROLA ANALOG I GND t PHL *Includes all probe and jig capacitance. Figure 9b. Propagation Delay, Test Set–Up Channel ANALOG I GND t PHL *Includes all probe and jig capacitance. ...

  • Page 9

    ... Figure 15b. Plot, Harmonic Distortion ON/OFF COMMON O/I TEST POINT OFF/ LATCH ENABLE CHANNEL SELECT ON/OFF NC COMMON O/I OFF/ CHANNEL SELECT Test Set-Up DEVICE SOURCE 2.0 3.125 FREQUENCY (kHz) MOTOROLA ...

  • Page 10

    ... Using Pull–Up Resistors Figure 18. Interfacing LSTTL/NMOS to CMOS Inputs MOTOROLA ever, tying unused analog inputs and outputs GND through a low value resistor helps minimize crosstalk and feedthrough noise that may be picked unused switch. Although used here, balanced supplies are not a require- ment ...

  • Page 11

    ... LEVEL SHIFTER LATCH 11 ENABLE 7 ENABLE 1 LEVEL SHIFTER 8 ENABLE 2 High–Speed CMOS Logic Data DL129 — Rev 6 MC54/74HC4351 MC54/74HC4353 FUNCTION DIAGRAM HC4351 FUNCTION DIAGRAM HC4353 MOTOROLA ...

  • Page 12

    ... PLANE –A– –B– 20X 0.010 (0.25 18X K MOTOROLA OUTLINE DIMENSIONS J SUFFIX CERAMIC PACKAGE CASE 732–03 ISSUE SUFFIX PLASTIC PACKAGE CASE 738–03 ISSUE ...

  • Page 13

    ... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...