MC54HC4353 Motorola, MC54HC4353 Datasheet - Page 2

• Manufacturer Part Number: MC54HC4353
• Description: (MC54HC4351 / MC54HC4353) Analog Multiplexers/Demultiplexers with Address Latch
• Manufacturer: Motorola

MOTOROLA
MC54/74HC4351 MC54/74HC4353
CHANNEL–SELECT
CHANNEL–SELECT
NOTE:
ENABLES
ENABLES
SWITCH
SWITCH
This device allows independent control of each switch. Channel–Select
Input A controls the X Switch, Input B controls the Y Switch, and Input C
controls the Z Switch.
LATCH ENABLE
LATCH ENABLE
INPUTS/OUTPUTS
INPUTS
INPUTS
ENABLE 1
ENABLE 2
ENABLE 1
ENABLE 2
ANALOG
A
B
C
A
B
C
15
13
12
11
15
13
12
11
7
8
7
8
Triple Single–Pole, Double–Position Plus Common Off and Address Latch
X0
X1
Y0
Y1
Z0
Z1
X0
X1
X2
X3
X4
X5
X6
X7
ADDRESS
CHANNEL
CHANNEL
ADDRESS
LATCH
LATCH
16
17
Single–Pole, 8–Position Plus Common Off and Address Latch
17
18
19
16
2
1
6
4
1
6
2
5
DEMULTIPLEXER
MULTIPLEXER/
X SWITCH
Y SWITCH
Z SWITCH
BLOCK DIAGRAM
LOGIC DIAGRAM
MC54/74HC4351
MC54/74HC4353
18
19
5
4
2
PIN 20 = V CC
PIN 9 = V EE
PIN 10 = GND
PINS 3, 14 = NC
X
Y
Z
PIN 20 = V CC
PIN 9 = V EE
PIN 10 = GND
PINS 3, 14 = NC
X
COMMON
OUTPUT/INPUT
COMMON
OUTPUT/INPUT
X = Don’t Care
* When Latch Enable is low, the Channel Selection
is latched and the Channel Address Latch does not
change states.
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
Enable
1
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X = don’t care
* When Latch Enable is low, the Channel
Control Inputs
Selection is latched and the Channel
Address Latch does not change states.
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
2
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
Enable
1
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
ENABLE 1
ENABLE 2
Control Inputs
FUNCTION TABLE
C
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
2
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
GND
V EE
FUNCTION TABLE
NC
Select
Y1
Y0
PIN ASSIGNMENT
Z0
Z1
MC54/74HC4351
NC = NO CONNECTION
Z
High–Speed CMOS Logic Data
B
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
C
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
2
3
4
5
6
7
8
9
10
Select
A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
B
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z0
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
Z1
A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
20
19
18
17
16
15
14
13
12
11
DL129 — Rev 6
(LE = H)*
(LE = H)*
(LE = H)*
Channel
Channel
Channel
None
None
None
On
On
(LE = H)*
(LE = H)*
(LE = H)*
V CC
Y
X
A
NC
B
C
LATCH
ENABLE
Y0
Y0
Y0
Y0
Y0
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y0
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
X1
X0
Channel
Channel
Channel
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
ON
ON
X0
X0
X1
X1
X1
X2
X2
X2
X2
X3
X3
X3
X3
X3
X4
X4
X4
X4
X4
X4
X5
X5
X5
X5
X5
X5
X5
X6
X6
X6
X6
X6
X6
X6
X6
X7
X7
X7
X7
X7
X7
X7
X7
X7
X0
X0
X1
X1
X1
X0
X0
X0
X0
X1
X1
X1
X1
X1
X0
X0
X0
X0
X0
X0
X1
X1
X1
X1
X1
X1
X1
X0
X0
X0
X0
X0
X0
X0
X0
X1
X1
X1
X1
X1
X1
X1
X1