MC74HC365

Manufacturer Part NumberMC74HC365
DescriptionHex 3-State Noninverting Buffer
ManufacturerMotorola
MC74HC365 datasheet
 


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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Hex 3-State Noninverting
Buffer with Common Enables
High–Performance Silicon–Gate CMOS
The MC54/74HC365 is identical in pinout to the LS365. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device is a high–speed hex buffer with 3–state outputs and two
common active–low Output Enables. When either of the enables is high, the
buffer outputs are placed into high–impedance states. The HC365 has
noninverting outputs.
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 90 FETs or 22.5 Equivalent Gates
LOGIC DIAGRAM
2
A0
4
A1
6
A2
10
A3
12
A4
14
A5
1
OUTPUT ENABLE 1
15
OUTPUT ENABLE 2
10/95
Motorola, Inc. 1995
MC54/74HC365
16
16
16
3
Y0
5
Y1
ENABLE 1
7
Y2
9
Y3
11
Y4
13
Y5
PIN 16 = V CC
PIN 8 = GND
Enable
X = don’t care
Z = high impedance
1
REV 6
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J SUFFIX
CERAMIC PACKAGE
CASE 620–10
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
DT SUFFIX
TSSOP PACKAGE
1
CASE 948F–01
ORDERING INFORMATION
MC54HCXXXJ
Ceramic
MC74HCXXXN
Plastic
MC74HCXXXDT
TSSOP
PIN ASSIGNMENT
OUTPUT
1
16
V CC
OUTPUT
A0
2
15
ENABLE 2
Y0
3
14
A5
A1
4
13
Y5
Y1
5
12
A4
A2
6
11
Y4
Y2
7
10
A3
GND
8
9
Y3
FUNCTION TABLE
Inputs
Output
Enable
1
2
A
Y
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z

MC74HC365 Summary of contents

  • Page 1

    ... In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 90 FETs or 22.5 Equivalent Gates LOGIC DIAGRAM OUTPUT ENABLE 1 15 OUTPUT ENABLE 2 10/95 Motorola, Inc. 1995 MC54/74HC365 ENABLE PIN PIN 8 = GND Enable X = don’ ...

  • Page 2

    ... C from 100 _ TSSOP Package: – 6.1 mW/ For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

  • Page 3

    ... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...

  • Page 4

    ... MC54/74HC365 TEST POINT OUTPUT DEVICE UNDER TEST * Includes all probe and jig capacitance Figure 3. INPUT A OUTPUT ENABLE 1 OUTPUT ENABLE 2 MOTOROLA TEST CIRCUITS OUTPUT DEVICE UNDER TEST * Includes all probe and jig capacitance LOGIC DETAIL TO OTHERS FIVE BUFFERS 4 www.DataSheet4U.com TEST POINT ...

  • Page 5

    ... DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.070 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7. 0.020 0.040 0.51 1.01 MOTOROLA ...

  • Page 6

    ... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...