HT45B0K Holtek Semiconductor, HT45B0K Datasheet - Page 15

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HT45B0K

Manufacturer Part Number
HT45B0K
Description
SPI to USB Bridge
Manufacturer
Holtek Semiconductor
Datasheet
HT45B0K
SPI to USB Bridge
Rev 1.00
SETIO Register
UIC register
Name
Name
POR
POR
R/W
R/W
Bit
Bit
The SETIO register is used to confi gure the endpoint FIFO as IN pipe or OUT pipe.
SETIO Register
Bit 7~6
Bit 5~1
Bit 0
The UIC register is used to control the interrupt request for each endpoint. Interrupts can be enabled
or disabled independently if the corresponding endpoint FIFO pipes are enabled.
UIC Register
Bit 7~6
Bit 5~0
Unimplemented, read as “0”.
SETIO5~SETIO1: Endpoint 5 FIFO ~ Endpoint FIFO1 pipe direction control.
Unimplemented, read as “0”.
EU5I~EU0I: USB Endpoint 5 ~ Endpoint 0 interrupt control as being accessed.
0: the corresponding endpoint FIFO is confi gured as OUT pipe.
1: the corresponding endpoint FIFO is confi gured as IN pipe.
DATATG: DATA0 toggle bit
0: no operation.
1: DATA0 will be sent fi rst.
0: disable the corresponding endpoint interrupt as it is accessed.
1: enable the corresponding endpoint interrupt as it is accessed.
If the related SETIO bit is set to 1, the corresponding endpoint FIFO is confi gured as IN
pipe for IN token operation. Otherwise, the corresponding endpoint FIFO is confi gured
as OUT pipe for OUT token operation. The purpose of this function is to avoid the USB
host from abnormally sending only an IN token or OUT token and disable the related
endpoint.
As the USB specification defined, when the USB host sends a “Set Configuration”
SETUP token, the Data pipe should send the DATA0 (Data toggle) first. Therefore,
when the USB device receives a “Set Confi guration” SETUP token, user needs to set
DATATG bit to 1 and then clear it to zero after a 2μs delay to generate a positive pulse
with 2μs pulse width to make sure that the next data will send a DATA0 fi rst.
If the related Endpoint FIFO pipe is enabled and the corresponding Endpoint interrupt is
enabled, the USB interrupt for endpoint access will occur. Then a low pulse signal will
be generated on
7
7
6
6
line to get the attentions from the host MCU.
SETIO5
EU5I
R/W
R/W
5
1
5
0
15
SETIO4
EU4I
R/W
R/W
4
1
4
0
SETIO3
EU3I
R/W
R/W
3
1
3
0
SETIO2
EU2I
R/W
R/W
2
1
2
0
SETIO1
EU1I
R/W
R/W
1
1
1
0
March 22, 2010
www.DataSheet4U.com
DATATG
EU0I
R/W
R/W
0
0
0
0

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