HT45B0K Holtek Semiconductor, HT45B0K Datasheet - Page 19

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HT45B0K

Manufacturer Part Number
HT45B0K
Description
SPI to USB Bridge
Manufacturer
Holtek Semiconductor
Datasheet
HT45B0K
SPI to USB Bridge
USB Interrupt Structure
Rev 1.00
Several individual USB conditions can generate a USB interrupt. These conditions are the USB
suspended, USB resume, USB reset and USB endpoint FIFO access events. When the USB
interrupt caused by any of these conditions occurs, a low pulse will be generated on the INT line to
get the attention of the microcontroller or microprocessor.
For the USB Endpoint FIFO access event, there are the corresponding indication fl ags to indicate
which endpoint FIFO is accessed. As the Endpoint FIFO access fl ag is set, it will generate a USB
interrupt on INT line if the associated Endpoint FIFO pipe and interrupt control are both enabled.
The Endpoint FIFO access flags should be cleared by the application program. As the USB
suspended, USB resume or USB reset condition occurs, the corresponding indication fl ag, known
as SUSP, RESUME and URST bits, will be set and a USB interrupt will directly generated without
any associated interrupt control being enabled. The SUSP, RESUME and URST bits are read only
and set or cleared by the USB SIE.
USB Interrupt Structure
19
March 22, 2010
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