HT45B0K Holtek Semiconductor, HT45B0K Datasheet - Page 5

• Manufacturer Part Number: HT45B0K
• Description: SPI to USB Bridge
• Manufacturer: Holtek Semiconductor

HT45B0K
SPI to USB Bridge
Functional Description
Rev 1.00
Command Type
SPI Interface
SPI Timing
Commands and Registers
Command/Address Format
Read Register
Write Register
The MCU communicates with the USB Module via an internal SPI interface. The SPI interface
on this device is comprised of four signals:
Data Input) and SDO (Serial Data Output). The SPI master, which is the MCU, asserts
pulling it low to start the data transaction cycle. When the fi rst 8 bits of data are transmitted,
should not return to a high level. Instead,
data transaction is completed. If
bit data transaction is completed, all data bits will be discarded by the USB Module SPI slave.
Both read and write operations are conducted along the SPI common interface with the following
format:
● Write Type Format: 8-bit command input + 8-bit data input
● Read Type Format: 8-bit command input + 8-bit data output
To initiate a data transaction, the MCU master SPI needs to pull
also pull SCK low. The input data bit on SDI should be stable before the next SCK rising edge,
as the device will latch the SDI status on the next SCK rising edge. Regarding the SDO line, the
output data bit will be updated on the SCK falling edge. The master needs to obtain the line status
before the next SCK falling edge.
There are 16 bits of data transmitted and/or received by the SPI interface for each transaction. Each
transaction consists of a command phase and a data phase. When
disabled and SDO will be set to a high impedance state.
After a complete transaction has been implemented, which requires 16 SCK clock cycles, the
master needs to set
For write operations, the device will begin to execute the command only after it receives a 16-bit
serial data sequence and when the
For read operations, the device will begin to execute the command only after it receives an 8-bit
read command after which it will be ready to output data. If necessary, the master can de-assert
the
abandoned.
There are 2 types of commands:
● Read Register
● Write Register
There are 17 registers available to control the USB module which are addressed by 5 address bits
A4~ A0 of Read /Write Register commands.
pin to abort the transaction at any time which will cause any data transactions to be
Bit.7
0
1
to a high level in preparation for the next data transaction.
Bit.6
X
X
Bit.5
X
X
is de-asserted, that is returned to a high level, before the 16-
5
has been set high again by the master.
Bit.4
A4
A4
must remain at a low level until the whole 16-bit
(SPI Chip Select), SCK (SPI Clock), SDI (Serial
Bit.3
A3
A3
Bit.2
A2
A2
to a low level fi rst and then
is high, the SPI interface is
Bit.1
A1
A1
March 22, 2010
www.DataSheet4U.com
Bit.0
A0
A0
by