UPD75208 NEC, UPD75208 Datasheet - Page 12

• Manufacturer Part Number: UPD75208
• Description: 4-BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

12
000AH
000CH
000EH
4. ARCHITECTURE AND MEMORY MAP OF THE PD75208
Address
0000H
0002H
0004H
0006H
0008H
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1F7FH
Remarks
The PD75208 has three architectural features:
Fig. 4-1 and 4-2 show the memory maps for the PD75208.
• Bank configuration of data memory
• Bank configuration of general registers: 8
• Memory mapped I/O
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
7
In all cases other than those listed above, branch to the address with only the lower 8 bits of the PC
changed is enabled by BR PCDE and BR PCXA instructions.
6
5
0
0
0
0
0
0
0
0
GETI Instruction Reference Table
Internal Reset Start Address
Internal Reset Start Address
INTBT/INT4 Start Address
INTBT/INT4 Start Address
INT0 Start Address
INT0 Start Address
INT1 Start Address
INT1 Start Address
INTSIO Start Address
INTSIO Start Address
INTT0 Start Address
INTT0 Start Address
NTTPG Start Address
INTTPG Start Address
INTKS Start Address
INTKS Start Address
Fig. 4-1 Program Memory Map
: Static RAM (448 words
Display data memory (49 words
Peripheral hardware (128
4
(High-Order 5 Bits)
4 banks (for operation in 4-bit units)
4 banks (for operation in 8-bit units)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
(High-Order 5 Bits)
(Low-Order 8 Bits)
0
4 bits)
CALLF
! faddr
Instruction
Entry
Address
4 bits)
BRCB
! caddr Instruction
Branch Address
4 bits)
BRCB
! caddr
Instruction
Branch
Address
CALL ! addr
Instruction
Subroutine Entry
Address
BR ! addr
Instruction Branch
Address
BR $addr
Instruction
Relative Branch
Address
(–15 to –1,
+2 to +16)
PD75208
Branch Destination
Address Specified
by GETI Instruction,
Subroutine Entry
Address