UPD75208 NEC, UPD75208 Datasheet - Page 48

• Manufacturer Part Number: UPD75208
• Description: 4-BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

48
Data Retention Timing (STOP Mode Release by RESET)
* 1. Current to the on-chip pull-down resistor and power-on reset circuit (mask option) is not included.
DATA MEMORY STOP MODE LOW POWER SUPPLY VOLTAGE DATA RETENTION CHARACTERISTICS (Ta = –40
to +85 C)
Release signal set time
Oscillation stabilization
wait time *2
Data retention power
supply voltage
Data retention power
supply current *1
2. Oscillation stabilization wait time is time to stop CPU operation to prevent unstable operation upon oscillation
3. According to the setting of the basic interval timer mode register (BTM) (see below).
RESET
PARAMETER
V
start.
DD
STOP Instruction Execution
BTM3
—
—
—
—
BTM2
0
0
1
1
SYMBOL
V
I
t
t
DDDR
SREL
WAIT
DDDR
BTM1
0
1
0
1
V
Release by RESET
Release by interrupt request
DDDR
Data Retention Mode
V
DDDR
BTM0
= 2.0V
0
1
1
1
STOP Mode
TEST CONDITIONS
Wait Time (Values at f
2
2
2
2
20
17
15
13
/f
/f
/f
/f
X
X
X
X
(approx. 250 ms)
(approx. 31.3 ms)
(approx. 7.82 ms)
(approx. 1.95 ms)
Internal Reset Operation
t
SREL
XX
= 4.19 MHz in parentheses)
HALT Mode
t
WAIT
MIN.
2.0
0
Operating Mode
2
TYP.
0.1
17
*3
/f
X
MAX.
6.0
10
PD75208
UNIT
ms
ms
V
A
s