UPD75218 NEC, UPD75218 Datasheet - Page 13

• Manufacturer Part Number: UPD75218
• Description: 4-BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

Caution The start address of an interrupt vector shown above consists of 14 bits. So the start address must be
Remark In all cases other than those listed above, branch to the address with only the lower 8 bits of the PC changed
000AH
000CH
000EH
0000H
0002H
0004H
0006H
0008H
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1FFFH
2000H
2FFFH
3000H
3FFFH
4000H
4FFFH
5000H
5FFFH
6000H
6FFFH
7000H
7F7FH
set within a 16K-byte space (0000H to 3FFFH).
is enabled by BR PCDE and BR PCXA instructions.
MBE RBE
MBE RBE
MBE RBE INT0 start address
MBE RBE INT1 start address
MBE RBE INTSO start address
MBE RBE INTT0 start address
MBE RBE INTTPG start address
MBE RBE INTKS start address
Internal reset start address
Internal reset start address
INTBT/INT4 start address
INTBT/INT4 start address
INT0 start address
INT1 start address
INTSO start address
INTTPG start address
INTKS start address
GETI instruction reference table
INTT0 start address
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
Fig. 4-1 Program Memory Map
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(high-order 6 bits)
(high-order 6 bits)
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
(low-order 8 bits)
(high-order 6 bits)
Entry address
specified in
CALLF !faddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address speci-
fied in BRCB !caddr
instruction
Branch address
specified in
BRCB !caddr
instruction
Branch address
specified in BR !addr
instruction
Branch address
specified in CALL !addr
instruction
Branch/call
address specified
in GETI instruction
Branch address
specified in BRA !addr
instruction
Branch address
specified in CALLA !addr
instruction
Relative branch address
specified in BR $addr
instruction (–15 to –1,
+2 to +16)
PD75218
13