DS2148 Dallas Semiconducotr, DS2148 Datasheet - Page 20

• Manufacturer Part Number: DS2148
• Description: 5V E1/T1/J1 Line Interface
• Manufacturer: Dallas Semiconducotr

LOOP BACK CONTROL IN HARDWARE MODE Table 4-5
TRANSMIT DATA CONTROL IN HARDWARE MODE Table 4-6
RECEIVE SENSITIVITY SETTINGS Table 4-7
MONITOR GAIN SETTINGS Table 4-8
INTERNAL RX TERMINATION SELECT Table 4-9
MCLK SELECTION Table 4-10
LOOPBACK
Remote Loop Back
Local Loop Back
Analog Loop Back
No Loop Back
TRANSMIT DATA
Transmit Unframed All Ones
Transmit Alternating Ones and
Zeros
Transmit PRBS
TPOS and TNEG
(CCR5.1)
2.048MHz
2.048MHz
1.544MHz
(CCR4.4)
(CCR5.5)
MCLK
RT1
MM1
EGL
0
0
1
1
0
1
1
0
0
0
1
1
SYMBOL
RLB
ALB
LLB
–
(CCR5.0)
SYMBOL
RT0
(CCR1.7)
(CCR5.4)
(CCR1.3)
JAMUX
TPRBSE
0
1
0
1
TAOZ
0 (E1)
0 (E1)
1 (T1)
1 (T1)
MM0
TUA1
ETS
0
1
0
1
0
1
0
–
CONTROL BIT
CCR6.6
CCR6.7
CCR6.4
–
20 of 75
CONTROL BIT
Internal receive-side termination disabled
Internal receive-side 120W enabled
Internal receive-side 100W enabled
Internal receive-side 75W enabled
-12dB (short haul)
-43dB (long haul)
-30dB (limited long haul)
-36dB (long haul)
CCR3.7
CCR3.5
CCR3.4
TERMINATION CONFIGURATION
INTERNAL LINEAR GAIN
Normal operation (no boost)
RECEIVE SENSITIVITY
–
INTERNAL RECEIVE
BOOST (dB)
LOOP1
(CCR1.7)
1
1
0
0
ETS
20
26
32
0
1
1
TX1
1
1
0
0
LOOP0
TX0
1
0
1
0
1
0
1
0