DS2148 Dallas Semiconducotr, DS2148 Datasheet - Page 38

• Manufacturer Part Number: DS2148
• Description: 5V E1/T1/J1 Line Interface
• Manufacturer: Dallas Semiconducotr

RIR1 (08H): RECEIVE INFORMATION REGISTER 1
(MSB)
SYMBOL
ZD
(latched)
(latched)
(latched)
(latched)
(latched)
(latched)
RUA1C
RCLC
16ZD
JALT
HBD
N/A
N/A
ZD
16ZD
POSITION
RIR1.7
RIR1.6
RIR1.5
RIR1.4
RIR1.3
RIR1.2
RIR1.1
RIR1.0
HBD
DESCRIPTION
Zero Detect. Set when a string of at least four (ETS = 0) or
eight (ETS = 1) consecutive zeros (regardless of the length of
the string) have been received. Will be cleared when read.
Sixteen Zero Detect. Set when at least 16 consecutive zeros
(regardless of the length of the string) have been received. Will
be cleared when read.
HDB3/B8ZS Word Detect. Set when an HDB3 (ETS = 0) or
B8ZS (ETS = 1) code word is detected independent of whether
the receive HDB3/B8ZS mode (CCR4.6) is enabled. Will be
cleared when read. Useful for automatically setting the line
coding.
Receive Carrier Loss Clear. Set when the RCL alarm has met
the clear criteria defined in Table 7-1. Will be cleared when
read.
Receive Unframed All Ones Clear. Set when the unframed all
ones signal is no longer detected. Will be cleared when read.
See Table 7-1.
Jitter Attenuator Limit Trip. Set when the jitter attenuator
FIFO reaches to within 4 bits of its useful limit. Will be cleared
when read. Useful for debugging jitter attenuation operation.
Not Assigned. Could be any value when read.
Not Assigned. Could be any value when read.
RCLC
38 of 75
RUA1C
JALT
N/A
(LSB)
N/A