DS2154 Dallas Semiconducotr, DS2154 Datasheet - Page 69

• Manufacturer Part Number: DS2154
• Description: Enhanced E1 Single Chip Transceiver
• Manufacturer: Dallas Semiconducotr

DS2154
RECEIVE SIDE BOUNDARY TIMING
(WITH ELASTIC STORE DISABLED) Figure 13-2
NOTES:
1. RCHBLK is programmed to block Channel 2.
2. RLCLK is programmed to pulse high during the Sa4 bits position.
3. Shown is a non-align frame boundary.
4. RSIG normally contains the CAS multiframe alignment nibble (0000) in Channel 1.
RECEIVE SIDE 1.544 MHz BOUNDARY TIMING
(WITH ELASTIC STORE ENABLED) Figure 13-3
NOTES:
1. Data from the E1 Channels 1, 5, 9, 13, 17, 21, 25, and 29 is dropped (Channel 2 from the E1 link is
mapped to Channel 1 of the T1 link, etc.) and the F-bit position is added (forced to 1).
2. RSYNC is in the output mode (RCR1.5=0).
3. RSYNC is in the input mode (RCR1.5=1).
4. RCHBLK is programmed to block Channel 24.
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