DS2182A Dallas Semiconducotr, DS2182A Datasheet - Page 15

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DS2182A

Manufacturer Part Number
DS2182A
Description
T1 Line Monitor
Manufacturer
Dallas Semiconducotr
Datasheet
RCR2: RECEIVE CONTROL REGISTER 2 Figure 13
MSB
193S RECEIVE MULTIFRAME TIMING Figure 14
NOTES:
1. Signaling data is updated during signaling frames on channel boundaries. Pin RABCD is the LSB of
2. RLINK data (S-bit) is updated one bit-time prior to S-bit frames and held for two frames.
SYMBOL
each channel word in non-signaling frames.
BVCRF
SFYEL
B8ZS
-
FM
-
-
-
-
-
POSITION
RCR2.7
RCR2.6
RCR2.5
RCR2.4
RCR2.3
RCR2.2
RCR2.1
RCR2.10
BVCRF
NAME AND DESCRIPTION
Reserved; must be 0 for proper operation.
Reserved; must be 0 for proper operation.
Bipolar Violation Count Register Function Select.
0 = do not count excessive 0s
1 = count excessive 0s
Frame Mode.
1 = Extended Superframe (193E, 24 frames per Superframe).
0 = Superframe (193S or D4, 12 frames per Superframe).
SF Yellow Mode Select.
1 = 1 in the S-bit position of frame 12.
0 = 0 in bit 2 of all channels.
Bipolar Eight Zero Substitution.
1 = B8ZS enabled.
0 = B8ZS disabled.
Reserved; must be 0 for proper operation.
Reserved; must be 0 for proper operation.
FM
15 of 25
SFYEL
B8ZS
-
LSB
DS2182A
-

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