DS2182A Dallas Semiconducotr, DS2182A Datasheet - Page 7

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DS2182A

Manufacturer Part Number
DS2182A
Description
T1 Line Monitor
Manufacturer
Dallas Semiconducotr
Datasheet
occurrences of 8 consecutive zeros when B8ZS is enabled or 16 consecutive zeros when B8Z5 is
disabled. This counter increments at all times and is not disabled by a loss of sync condition (RLOS = 1).
The counter saturates at 65,535 and generates an interrupt for each occurrence after saturation if RIMR2.0
is set.
NOTE:
1. In order to properly preset the Bipolar Violation Count Register, BVCR2 must be written to before
CRCCR: CRC COUNT REGISTER 2 Figure 5
MSB
The CRC Count Register (CRCCR) is an 8-bit presettable counter that records word errors in the Cyclic
Redundancy Check (CRC). This 8-bit binary counter saturates at 255 and generates an interrupt for each
occurrence after saturation if RIMR2.1 is set. The count in this register is only valid in the 193E framing
mode (RCR2.4 = 1) and is reset and disabled in the 193S framing mode (RCR2.4 = 0). The count is
disabled during a loss of sync condition (RLOS = 1).
OOFCR: OOF COUNT REGISTER Figure 6
MSB
The OOF Count Register (OOFCR) is an 8-bit presettable counter that records Out Of Frame (OOF)
events. OOF events are defined by RCR1.5 and RCR1.6. This 8-bit counter saturates at 255 and
generates an interrupt for each occurrence after saturation if RIMR2.2 is set. The count is disabled during
a loss of sync condition (RLOS = 1).
SYMBOL
SYMBOL
CRC7
BVCR1 is written to.
OOF7
CRC7
CRC0
OOF7
OFF0
CRC6
OOF6
POSITION
POSITION
CRCCR.7
CRCCR.0
OOFCR.7
OOFCR.0
CRC5
OOF5
NAME AND DESCRIPTION
MSB of CRC6 word error count
LSB of CRC6 word error count
NAME AND DESCRIPTION
MSB of OOF event count
LSB of OOF of event count
CRC4
OOF4
7 of 25
CRC3
OOF3
CRC2
OOF2
CRC1
OOF1
LSB
LSB
CRC0
OOF0
DS2182A

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