DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 135

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DS2196

Manufacturer Part Number
DS2196
Description
T1 Dual Framer LIU
Manufacturer
Dallas Semiconducotr
Datasheet

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Figure 21-3: RECEIVE SIDE BOUNDARY TIMING
RMSYNC
RCHCLK
RCHBLK
RFSYNC
RLCLK
RLOS
RBPV
RSER
RLINK
RCLK
1
2
3
4
Notes:
1. RLOS transitions high during the F-bit time that caused an OOF event or when loss of carrier is detected.
2. RBPV transitions high when the bit in error emerges from RSER. If B8ZS is enabled, RBPV
3. RCHBLK is programmed to block channel 24.
4. Shown is RLINK/RLCLK in the ESF framing mode
will not report the zero replacement code.
CHANNEL 23
LSB MSB
CHANNEL 24
135 of 157
LSB
F
MSB
CHANNEL 1

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