DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 40

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

CCR2A: COMMON CONTROL REGISTER 2 FRAMER A (Address = 38 Hex)
(MSB)
TFM
SYMBOL
RSLC96
TSLC96
RB8ZS
TB8ZS
RFDL
TZSE
RFM
TFM
TB8ZS
POSITION
CCR2A.7
CCR2A.6
CCR2A.5
CCR2A.4
CCR2A.3
CCR2A.2
CCR2A.1
CCR2A.0
TSLC96
NAME AND DESCRIPTION
Transmit Frame Mode Select.
0 = D4 framing mode
1 = ESF framing mode
Transmit B8ZS Enable.
0 = B8ZS disabled
1 = B8ZS enabled
Transmit SLC–96 / Fs–Bit Insertion Enable. Only set this
bit to a 1 in D4 framing applications. Must be set to 1 to source
the Fs pattern. See Section 18 for details.
0 = SLC–96/Fs–bit insertion disabled
1 = SLC–96/Fs–bit insertion enabled
Transmit FDL Zero Stuffer Enable. Set this bit to 0 if using
the internal HDLC/BOC controller instead of the legacy support
for the FDL. See Section 18 for details.
0 = zero stuffer disabled
1 = zero stuffer enabled
Receive Frame Mode Select.
0 = D4 framing mode
1 = ESF framing mode
Receive B8ZS Enable.
0 = B8ZS disabled
1 = B8ZS enabled
Receive SLC–96 Enable. Only set this bit to a 1 in D4/SLC–
96 framing applications. See Section 18 for details.
0 = SLC–96 disabled
1 = SLC–96 enabled
Receive FDL Zero Destuffer Enable. Set this bit to 0 if using
the internal HDLC/BOC controller instead of the legacy support
for the FDL. See Section 18 for details.
0 = zero destuffer disabled
1 = zero destuffer enabled
TZSE
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RFM
RB8ZS
RSLC96
(LSB)
RFDL
DS2196