DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 43

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

CCR3B: COMMON CONTROL REGISTER 3 FRAMER B (Address = D0 Hex)
(MSB)
TCLKSRC
SYMBOL
–
TLOOP
RLOSF
FBCT2
FBCT1
RSMS
ECUS
–
TCLKSRC
POSITION
CCR3B.7
CCR3B.6
CCR3B.5
CCR3B.4
CCR3B.3
CCR3B.2
CCR3B.1
CCR3B.0
RLOS
NAME AND DESCRIPTION
Not Assigned. Should be set to 0 when written to.
Transmit Clock Source Select. This function allows the user
to internally select MCLK as the clock source for the transmit
side formatter.
0 = TCLK supplied by LOTC mux (see TCR1B.7)
1 = use MCLK for TCLK
Function of the RLOSB/LOTCB Output.
0 = Receive Loss of Sync (RLOS)
1 = Loss of Transmit Clock (LOTC)
RMSYNC Multiframe Skip Control. Useful in framing
format conversions from D4 to ESF.
0 = RMSYNCB will output a pulse at every multiframe
1 = RMSYNCB will output a pulse at every other multiframe
F Bit Corruption Type 2. Setting this bit high enables the
corruption of one Ft (D4 framing mode) or FPS (ESF framing
mode) bit in every 128 Ft or FPS bits as long as the bit remains
set.
Error Counter Update Select. Selects the update rate of the
error counters and the period of the One Second Timer
(SR2B.5). See Sections 7 & 8 for details.
0 = update error counters once a second
1 = update error counters every 42 ms (333 frames)
Transmit Loop Code Enable. See Section 12 for details.
0 = transmit data normally
1 = replace normal transmitted data with repeating code as
defined in TCD register
F Bit Corruption Type 1. A low to high transition of this bit
causes the next three consecutive Ft (D4 framing mode) or FPS
(ESF framing mode) bits to be corrupted causing the remote
end to experience a loss of synchronization.
RSMS
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FBCT2
ECUS
TLOOP
FBCT1
(LSB)
DS2196