DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 64

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

IMR2B: INTERRUPT MASK REGISTER 2 FRAMER B (Address = EF Hex)
8. ERROR COUNT REGISTERS
There is a set of three counters per framer that record bipolar violations, excessive zeros, errors in the
CRC6 code words, framing bit errors, and number of multiframes that the device is out of receive
synchronization. Each of these three counters can be automatically updated on either one second
boundaries (CCR3.2=0) or every 42 ms (CCR3.2=1) as determined by the timer in Status Register 2
(SR2.5) or manually (CCR6.6=1 and triggering with CCR6.5). When updated automatically, the user
can use the interrupt from the one-second timer to determine when to read these registers. The user has a
full second (or 42 ms) to read the counters before the data is lost. All three counters will saturate at their
respective maximum counts and they will not rollover (note: only the Line Code Violation Count Register
has the potential to over-flow but the bit error would have to exceed 10E-2 before this would occur).
(MSB)
RMF
SYMBOL
RMTCH
RFDL
TFDL
RMF
TMF
RAF
SEC
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TMF
POSITION
IMR2B.7
IMR2B.6
IMR2B.5
IMR2B.4
IMR2B.3
IMR2B.2
IMR2B.1
IMR2B.0
SEC
NAME AND DESCRIPTION
Receive Multiframe.
0 = interrupt masked
1 = interrupt enabled
Transmit Multiframe.
0 = interrupt masked
1 = interrupt enabled
One Second Timer.
0 = interrupt masked
1 = interrupt enabled
Receive FDL Buffer Full.
0 = interrupt masked
1 = interrupt enabled
Transmit FDL Buffer Empty.
0 = interrupt masked
1 = interrupt enabled
Receive FDL Match Occurrence.
0 = interrupt masked
1 = interrupt enabled
Receive FDL Abort.
0 = interrupt masked
1 = interrupt enabled
Not Assigned. Should be set to 0 when written to.
RFDL
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TFDL
RMTCH
RAF
(LSB)
DS2196
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