DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 68

• Manufacturer Part Number: DS2196
• Description: T1 Dual Framer LIU
• Manufacturer: Dallas Semiconducotr

9. SIGNALING OPERATION
The robbed–bit signaling bits embedded in the T1 stream can be extracted from the receive stream and
inserted into the transmit stream by each framer. There is a set of 12 registers for the receive side (RS1 to
RS12) and 12 registers on the transmit side (TS1 to TS12). The signaling registers are detailed below.
The CCR1.5 bit is used to control the robbed signaling bits as they appear at RSER. If CCR1.5 is set to
0, then the robbed signaling bits will appear at the RSER pin in their proper position as they are received.
If CCR1.5 is set to a 1, then the robbed signaling bit positions will be forced to a 1 at RSER.
RS1A TO RS12A: RECEIVE SIGNALING REGISTERS FRAMER A
(Address = 60 to 6B Hex)
RS1B TO RS12B: RECEIVE SIGNALING REGISTERS FRAMER B
(Address = E0 to EB Hex)
A(8)
A(16)
A(24)
B(8)
B(16)
B(24)
A/C(8)
A/C(16)
A/C(24)
B/D(8)
B/D(16)
B/D(24)
(MSB)
FRAMING MODE
SYMBOL
D(24)
A(1)
(CCR2.3)
ESF
ESF
D4
D4
A(7)
A(15)
A(23)
B(7)
B(15)
B(23)
A/C(7)
A/C(15)
A/C(23)
B/D(7)
B/D(15)
B/D(23)
POSITION
B(6)
A/C(6)
A/C(14)
A/C(22)
A(6)
A(14)
A(22)
B(14)
B(22)
B/D(6)
B/D(14)
B/D(22)
RS12.7
RS1.0
COUNT MOS OR F–BIT
A(5)
A(13)
A(21)
B(5)
B(13)
B(21)
A/C(5)
A/C(13)
A/C(21)
B/D(5)
B/D(13)
B/D(21)
ERRORS
(RCR2.0)
F–Bit
F–Bit
MOS
MOS
NAME AND DESCRIPTION
Signaling Bit D in Channel 24
Signaling Bit A in Channel 1
A(4)
A(12)
A(20)
B(4)
B(12)
B(20)
A/C(4)
A/C(12)
A/C(20)
B/D(4)
B/D(12)
B/D(20)
68 of 157
number of multiframes out of sync
errors in the Ft pattern
number of multiframes out of sync
errors in the FPS pattern
A(3)
A(11)
A(19)
B(3)
B(11)
B(19)
A/C(3)
A/C(11)
A/C(19)
B/D(3)
B/D(11)
B/D(19)
WHAT IS COUNTED
IN THE MOSCRs
A(2)
A(10)
A(18)
B(2)
B(10)
B(18)
A/C(2)
A/C(10)
A/C(18)
B/D(2)
B/D(10)
B/D(18)
A(1)
A(9)
A(17)
B(1)
B(9)
B(17)
A/C(1)
A/C(9)
A/C(17)
B/D(9)
B/D(17)
B/D(1)
(LSB)
RS1
RS2
RS3
RS4
RS5
RS6
RS7
RS8
RS9
RS10
RS11
RS12
DS2196