DS21Q41BTN Dallas Semiconducotr, DS21Q41BTN Datasheet - Page 27

• Manufacturer Part Number: DS21Q41BTN
• Description: Quad T1 Framer
• Manufacturer: Dallas Semiconducotr

SR2: STATUS REGISTER 2 (Address=21 Hex)
(MSB)
RMF
SYMBOL
RMTCH
LORC
RFDL
TFDL
RMF
TMF
RAF
SEC
TMF
POSITION
SR2.7
SR2.6
SR2.5
SR2.4
SR2.3
SR2.2
SR2.1
SR2.0
SEC
NAME AND DESCRIPTION
Receive Multiframe. Set on receive multiframe boundaries.
Transmit Multiframe. Set on transmit multiframe boundaries.
1-Second Timer. Set on increments of 1 second based on
RCLK; will be set in increments of 999 ms, 999 ms, and 1002
ms every 3 seconds.
Receive FDL Buffer Full. Set when the receive FDL buffer
(RFDL) fills to capacity (8 bits).
Transmit FDL Buffer Empty. Set when the transmit FDL
buffer (TFDL) empties.
Receive FDL Match Occurrence. Set when the RFDL matches
either RFDLM1 or RFDLM2.
Receive FDL Abort. Set when eight consecutive 1s are received
in the FDL.
Loss of Receive Clock. Set when the RCLK pin has not
transitioned for at least 2 s (3 s ± 1 s).
RFDL
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TFDL
RMTCH
RAF
LORC
DS21Q41B
(LSB)