DS21Q41BTN Dallas Semiconducotr, DS21Q41BTN Datasheet - Page 46

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DS21Q41BTN

Manufacturer Part Number
DS21Q41BTN
Description
Quad T1 Framer
Manufacturer
Dallas Semiconducotr
Datasheet

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DS21Q41BTN
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TRANSMIT SIDE ESF TIMING Figure 12-7
NOTES:
1. TSYNC in the frame mode (TCR2.3=0) and double-wide frame sync is not enabled (TCR2.4=0).
2. TSYNC in the frame mode (TCR2.3=0) and double-wide frame sync is enabled (TCR2.4=1).
3. TSYNC in the multiframe mode (TCR2.4=1).
4. ZBTSI mode disabled (TCR2.5=0).
5. TLINK data (FDL bits) is sampled during the F-bit time of odd frame and inserted into the outgoing
6. ZBTSI mode is enabled (TCR2.5=1).
7. TLINK data (Z-bits) is sampled during the F-bit time of frame 1, 5, 9, 13, 17, and 21 and inserted into
8. TLINK and TLCLK are not synchronous with TFSYNC.
T1 stream if enabled via TCR1.2.
the outgoing stream if enabled via TCR1.2.
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DS21Q41B

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