DS2430AT Dallas Semiconducotr, DS2430AT Datasheet

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DS2430AT

Manufacturer Part Number
DS2430AT
Description
256-Bit 1-Wire EEPROM
Manufacturer
Dallas Semiconducotr
Datasheet
FEATURES
§ 256-bit Electrically Erasable Programmable
§ Unique, factory-lasered and tested 64-bit
§ Built-in multidrop controller ensures
§ EEPROM organized as one page of 32 bytes
§ Reduces control, address, data and power to a
§ Directly connects to a single port pin of a
§ 8-bit family code specifies DS2430A
§ Presence detector acknowledges when reader
§ Low cost TO-92 or 6-pin TSOC surface mount
§ Reads and writes over a wide voltage range of
ORDERING INFORMATION
DS2430A
DS2430AP
DS2430AT
DS2430AV
DS2430AX
www.dalsemi.com
Read Only Memory (EEPROM) plus 64-bit
one-time programmable application register
registration number (8-bit family code + 48-bit
serial number + 8-bit CRC tester) assures
absolute identity because no two parts are alike
compatibility with other MicroLAN products
for random access
single data pin
microprocessor and communicates at up to
16.3 kbits per second
communication requirements to reader
first applies voltage
package
2.8V to 6.0V from -40°C to +85°C
TO-92 package
6-pin TSOC package
Tape & Reel version of DS2430A
Tape & Reel version of DS2430AP
Chip Scale Pkg., Tape & Reel
1 of 16
PIN ASSIGNMENT
PIN DESCRIPTION
Pin 1
Pin 2
Pin 3
Pin 4
Pin 5
Pin 6
Drawings Section
BOTTOM VIEW
256-Bit 1-Wire
See Mech.
1
TO-92
DS2430A
1 2 3
DALLAS
TO-92
Ground
Data
NC
––––
––––
––––
2 3
TSOC
Ground
Data
NC
NC
NC
TM
TSOC PACKAGE
3.7 X 4.0 X 1.5 mm
Drawing Section
DS2430A
EEPROM
SIDE VIEW
See Mech.
TOP VIEW
1
2
3
6
5
4
102199

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DS2430AT Summary of contents

Page 1

... Reads and writes over a wide voltage range of 2.8V to 6.0V from -40°C to +85°C ORDERING INFORMATION DS2430A TO-92 package DS2430AP 6-pin TSOC package DS2430AT Tape & Reel version of DS2430A DS2430AV Tape & Reel version of DS2430AP DS2430AX Chip Scale Pkg., Tape & Reel 256-Bit 1-Wire ...

Page 2

SILICON LABEL DESCRIPTION The DS2430A 256-bit 1-Wire EEPROM identifies and stores relevant information about the product to which it is associated. This lot or product specific information can be accessed with minimal interface, for example a single port pin of ...

Page 3

DS2430A BLOCK DIAGRAM Figure DS2430A 102199 ...

Page 4

HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2 64-BIT LASERED ROM Figure 3 8-Bit CRC Code MSB 1-WIRE CRC GENERATOR Figure 4 48-Bit Serial Number LSB MSB 8 5 Polynomial = 8-Bit Family ...

Page 5

MEMORY The memory of the DS2430A consists of three separate sections, called data memory, application register and status register (Figure 5). The data memory and the application register each has its own intermediate storage area called scratchpad that acts as ...

Page 6

MEMORY FUNCTION FLOW CHART Figure 6 COPY SCRATCHPAD [55h] After the data stored in the scratchpad has been verified the master may send the Copy Scratchpad command followed by a validation key of A5h to transfer data from the scratchpad ...

Page 7

MEMORY FUNCTION FLOW CHART Figure 6 (cont’ d) WRITE APPLICATION REGISTER [99h] This command is essentially the same as the Write Scratchpad command, but it addresses the 64-bit register scratchpad. After issuing the command code, the master must provide a ...

Page 8

MEMORY FUNCTION FLOW CHART Figure 6 (cont’ d) READ APPLICATION REGISTER [C3h] This command is used to read the application register or the register scratchpad. As long as the application register is not yet locked, one will receive data from ...

Page 9

BUS SYSTEM The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances, the DS2430A is a slave device. The bus master is typically a microcontroller. The discussion of this ...

Page 10

ROM FUNCTIONS FLOW CHART Figure DS2430A 102199 ...

Page 11

Transaction Sequence The sequence for accessing the DS2430A via the 1-Wire port is as follows: § Initialization § ROM Function Command § Memory Function Command § Transaction/Data INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The ...

Page 12

After one complete pass, the bus master knows the contents of the ROM in one device. The remaining number of devices and their ROM codes may be identified by additional passes. See Chapter 5 of the Book of DS19xx iButton ...

Page 13

READ/WRITE TIMING DIAGRAM Figure 10 Write-1 Time Slot Write-0 Time Slot Read-data Time Slot DS2430A 102199 ...

Page 14

MEMORY FUNCTION EXAMPLE Example: Write 2 data bytes to data memory location 0006 and 0007. Read entire data memory. MASTER MODE DATA (LSB FIRST <2 data bytes> ...

Page 15

ABSOLUTE MAXIMUM RATINGS* Voltage on DATA to Ground Operating Temperature Storage Temperature Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections ...

Page 16

NOTES: 1. All voltages are referenced to ground =external pullup voltage. PUP 3. Input load is to ground additional reset or communication sequence cannot begin until the reset high time has expired. 5. Read data setup ...

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