DS2480 Dallas Semiconducotr, DS2480 Datasheet
DS2480
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DS2480 Summary of contents
Page 1
... Low cost 8–pin SOIC surface mount package Operates over 4.5V to 5.5V from – +85 C DESCRIPTION The DS2480 is a serial port to 1–Wire interface chip that supports standard and Overdrive speeds. It connects directly to UARTs and 5V RS232 systems. Interfacing to RS232C ( 12V levels) requires a passive clamping cir- cuit and one 5V to 12V level translator. Internal timers relieve the host of the burden of generating the time– ...
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... DD POL, but the polarity at RXD will be the opposite of what the logic level at POL specifies. As data enters the core of the DS2480’s logic circuitry analyzed to separate data and command bytes and to calibrate the device’s timing generator. The timing gen- erator controls all speed relations of the communication interface and the 1– ...
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... The DS2480 requires and gener- ates a communication protocol of 8 data bits per charac- ter, 1 stop bit and no parity permissible to use two stop bits on the TXD line. However, the DS2480 will only assert a single stop bit on RXD. When powering up, the DS2480 performs a master reset cycle and enters the Command Mode, which is one of the two static states ...
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... DS2480 STATE TRANSITION DIAGRAM Figure 2 SOFTWARE MASTER RESET POWER OFF COMMAND MODE 110XSS01 111T11Q1 N.C. N.C. PULSE RESET CONFIGURATION 111T11Q1 110XSS01 E1h E3h TX E3h CODE = E3h N.C. DATA MODE ALL OTHER CODES N.C. = UNCONDITIONAL LEGEND: V BINARY VALUE (TYPE OF WRITE TIME SLOT) SS 1–WIRE SPEED SELECTION CODE P IF LOGIC 1, GENERATES STRONG PULL– ...
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... The fact that the host receives the byte unsolicited together with the pattern 01b in the least significant two bits marks the bus arrival. If the DS2480 is left in Data Mode after completing a memory function command it will not report any bus arrival to the host. ...
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... The type of the time slot (write zero or write one) is determined by the logic value of bit 4. A read data time slot is identical to the write one time slot. Bits 0 and 1 of the response byte transmitted by the DS2480 at the 042498 6/26 BIT 4 BIT 3, BIT 2 ...
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... Although arming or disarming is simultaneously possible while generating a programming pulse, this is not recommended since it is likely to destroy the DS2480 if non–EPROM devices are connected to the 1–Wire bus. The duration of the strong pull–up or programming pulse is determined by configuration parameters and ranges from a few microseconds up to unlimited (see section Configuration Commands) ...
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... The character “r” marks the path that particular bit in case of a conflict during the execution of the ROM Search. For each bit position n (values from 0 to 63) the DS2480 will generate three time slots on the 1–Wire bus. These are referenced as: ...
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... C1 C9 DS2480 CONFIGURATION COMMANDS The DS2480 is designed to be configurable for the vary- ing requirements of its application. When the device powers up and/or performs a master reset cycle, the hard–wired default configuration settings take effect. These settings will work on a short 1–Wire bus and assume regular 1– ...
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... POL pin (asymmetry bit, see Figure 1). This may reduce the component count in some applications of the device. Note that when chang- ing the baud rate, the DS2480 will send the command response byte at the new data rate. A short explanation on the use of parameters 100 (Write 1 low time) and 101 (Data Sample Offset/Write 0 Recov- ery Time) is given in the section “ ...
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... Table 6). BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 parameter code parameter value code 0 0 parameter code BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 same as sent same as sent same as sent parameter value code DS2480 BIT BIT 042498 11/26 ...
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... DS2480 CONTROLLED EDGES One of the tasks of the DS2480 is to actively shape the edges of the 1–Wire communication waveforms. This speeds up the recharging of the 1–Wire bus (rising edges) and reduces ringing of long lines (falling edges). The circuitry for shaping rising edges is always on. The ...
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... DS2480 will wait for t and test the volt- PDT age on the 1–Wire bus for a presence pulse. Regardless of the result of the presence test, the DS2480 will then wait for t to expire and then send the command FILL response byte to the host. ...
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... Therefore, the timing generated by the DS2480 is in compliance with the requirements of all MicroLAN–compatible 1–Wire devices. 042498 14/26 time to recharge also recommended to delay sam- pling the bus for reading ...
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... A correct programming pulse can only be generated if the 12V programming voltage is available at the Vpp pin of the DS2480. The slew rate of the rising and falling edge of the programming pulse (“steep slopes”) is not actively controlled by DS2480. fined duration, which should be considered the normal case ...
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... TIME BEGIN OF NEXT TIME SLOT DS2480 will immediately end the pulse and send out the response byte of the pulse command. The idle time between t and t is determined by the time to transmit 1 2 the command byte at the selected baud rate. The idle ...
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... Without any delay the DS2480 now activates the strong pull–up and simulta- neously starts sending the data response byte to the host the strong pull–up ends and the DS2480 2 sends a pulse response byte to the host ...
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... For infinite duration (Figure 9b) the strong pull–up also begins immediately after the time slot is completed. To end the strong pull–up, the DS2480 must receive a ter- mination command, code F1h, which occurs at t termination command does not generate a response byte. The DS2480 will then immediately end the strong pull– ...
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... The response byte on the reset command assumes a normal presence pulse, no alarm or short. The DS2480 includes a 1–byte buffer that stores a byte received from the host while the previous byte is being translated into activity on the 1–Wire bus. For this rea- son the host may send another byte even without having received the response byte ...
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... DS2480 WRITE EPROM SEQUENCE (DS2505) Write memory starting at address 40h Action Sequence Host TX Host RX Set Vpp dur. = 512 Generate Reset Pulse C1 C9 Set data mode E1 (nothing) Skip ROM Command CC (as sent) Write Memory Command 0F (as sent) Starting Address TA1 40 (as sent) ...
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... HARDWARE APPLICATION EXAMPLES This section discusses five typical application scenarios of the DS2480. When directly designed into a new prod- uct, the device can be connected as shown in Figure 10a. UART DIRECT Figure 10a UART SIN (RXD SOUT (TXD START 0 +/(–) 5V RS232 Figure 10b ...
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... RETURN STOP FET that connects to the RXD output of the DS2480. In this circuit diagram the MOSFET switches the RXD line to +5V, which normally is sufficient for RS232C systems. Switching to 12V is also possible, but requires a P–channel transistor with a different threshold voltage. ...
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... HCPL–2300 M STOP In the schematic the HCPL–2202 opto–isolator is sourced by the RXD pin of the DS2480. It can as well be connected the traditional way where the DS2480 sinks the current through the LED. This, however, causes a signal inversion that has to be compensated through the DS2480 by using a value code of 100, 101, 110 or 111 for the RS232 baud rate setting. Using other types of opto– ...
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... DS2480 RS232 DATA TIMING TXD LINE Figure 13 START BIT 0 BIT 1 BIT 1 2 1/BAUD RATE OF UART T FUNCTION AND SPEED MATRIX Table 7 B Baud Rate d R Regular 9600 bps 9600 bps X 19200 bps 19200 bps X 57600 bps ...
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... C for 10 seconds (V = 4.5V to 5.5V;– MIN TYP MAX UNITS 4.5 5.0 5.5 V 11.75 12.25 V 3.0 5 –1.4 V –1 0.95 1.2 V 3 2.7 V 0.8 V 1.5 3.0 5 0 –4 mA 3.3 V 9.5 V MIN TYP MAX UNITS DS2480 NOTES NOTES 042498 25/26 ...
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... DS2480 AC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL UART Bit Time T T Device Bit Time T R Fall Time RXD t FR Rise Time RXD t RR Transmit Idle Time t IDLET Receive Idle Time t IDLER Asymmetry t ASYM Arrival Response Time t ARR Master Reset Time t MR Active Pull–Up on Time ...