IRCC2.0 SMSC Corporation, IRCC2.0 Datasheet - Page 61

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IRCC2.0

Manufacturer Part Number
IRCC2.0
Description
Infrared Communications Controller
Manufacturer
SMSC Corporation
Datasheet
Transmit Timing
Setting the appropriate SCE MODES bits in SCE
Line Control Register B enables the SCE IrDA-
mode transmitter. If the FIFO Threshold is zero,
message transmission begins as soon as
transmit mode has been enabled, the Transmit
Delay Timer has elapsed, and there is data in the
FIFO (Figure 22).
APPLICATION NOTE: The effects of the SCE
Transmit Delay Timer only apply to the first
message in a multi-frame window. This is the
default IrCC 2.0 behavior if the Brickwall bit is set
because only one Transmit Command is issued
for the entire window. If the Brickwall bit is not
active Transmit Commands must be re-issued
for each subsequent message in the window. In
this case, the user can re-program
FIFO Threshold Exceeded
Transmit Delay Timer
FIGURE 22 - SCE TRANSMIT COMMAND (FIFO THRESHOLD = 0)
FIGURE 23 - SCE TIMEOUT COMMAND (FIFO THRESHOLD > 0)
Transmit Command
Transmit Delay Timer
Transmit Command
FIFO Empty
TC Activated
Tx Enable
Tx Enable
61
If the FIFO Threshold is greater than zero,
message transmission begins only after transmit
mode has been enabled, the Transmit Delay
Timer has elapsed, and the FIFO Threshold has
been exceeded or TC is active (Figure 23).
Note: the IrDA-mode SCE transmitter will only be
enabled
generator is inactive (see the SIR Interaction
Pulse section on page 19).
the SCE Transmit Delay Timer to 0Fs until the
remaining messages in the window has been
transferred.
Once an IrDA transmission has begun, the End
of Message (EOM) and other state indicators are
cleared and the nActive Frame signal is enabled.
Following the end-of-frame sequence, an EOM
interrupt is generated and nActive Frame is
deactivated (Figure 24).
Delay Time
Delay Time
when
the
SIR
Interaction
Pulse

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