SN74AUC1G08

Manufacturer Part NumberSN74AUC1G08
DescriptionSINGLE 2-INPUT POSITIVE-AND GATE
ManufacturerTexas Instruments
SN74AUC1G08 datasheet
 


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D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
Optimized for 1.8-V Operation and Is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
D
I
Supports Partial-Power-Down Mode
off
Operation
D
Sub 1-V Operable
D
Max t
of 2.4 ns at 1.8 V
pd
DBV PACKAGE
(TOP VIEW)
A
1
5
B
2
3
4
GND
See mechanical drawings for dimensions.
description/ordering information
This single 2-input positive-AND gate is operational at 0.8-V to 2.7-V V
to 1.95-V V
operation.
CC
The SN74AUC1G08 performs the Boolean function Y + A • B or Y + A ) B in positive logic.
www.DataSheet4U.com
T A
NanoStar
WCSP (DSBGA) − YEA
NanoFree
WCSP (DSBGA) − YZA (Pb-free)
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
−40°C to 85°C
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SOT (SOT-23) − DBV
SOT (SC-70) − DCK
SOT (SOT-553) − DRL
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
D
Low Power Consumption, 10-µA Max I
D
±8-mA Output Drive at 1.8 V
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
A
V
1
5
CC
V
CC
B
2
GND
3
4
Y
Y
ORDERING INFORMATION
PACKAGE †
ORDERABLE PART NUMBER
SN74AUC1G08YEAR
SN74AUC1G08YZAR
Tape and reel
Tape and reel
SN74AUC1G08YEPR
SN74AUC1G08YZPR
Tape and reel
SN74AUC1G08DBVR
Tape and reel
SN74AUC1G08DCKR
Reel of 4000
SN74AUC1G08DRLR
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN74AUC1G08
SINGLE 2 INPUT POSITIVE AND GATE
SCES374L − SEPTEMBER 2001 − REVISED MAY 2005
DRL PACKAGE
YEA, YEP, YZA,
(TOP VIEW)
OR YZP PACKAGE
(BOTTOM VIEW)
A
1
5
V
CC
GND
3
B
2
B
2
GND
Y
3
4
1
5
A
, but is designed specifically for 1.65-V
CC
TOP-SIDE MARKING ‡
_ _ _UE_
_ _ _UE_
U08_
UE_
UE_
Copyright  2005, Texas Instruments Incorporated
CC
Y
4
V CC
1

SN74AUC1G08 Summary of contents

  • Page 1

    ... See mechanical drawings for dimensions. description/ordering information This single 2-input positive-AND gate is operational at 0.8-V to 2.7 1.95-V V operation. CC The SN74AUC1G08 performs the Boolean function • positive logic. www.DataSheet4U.com T A NanoStar WCSP (DSBGA) − YEA NanoFree WCSP (DSBGA) − YZA (Pb-free) NanoStar ...

  • Page 2

    ... SN74AUC1G08 SINGLE 2 INPUT POSITIVE AND GATE SCES374L − SEPTEMBER 2001 − REVISED MAY 2005 description/ordering information (continued) NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using I preventing damaging current backflow through the device when it is powered down ...

  • Page 3

    ... 2 2.7 V TEST CONDITIONS 2.7 V 0.8 V 1.1 V 1.4 V 1.65 V 2 2.7 V 0.8 V 1.1 V 1.4 V 1. 2.7 V 2.5 V • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 SN74AUC1G08 MIN MAX UNIT 0.8 2.7 V 0.65 × 1.7 0.35 × 0 −0.7 −3 − ...

  • Page 4

    ... SN74AUC1G08 SINGLE 2 INPUT POSITIVE AND GATE SCES374L − SEPTEMBER 2001 − REVISED MAY 2005 switching characteristics over recommended operating free-air temperature range, C (unless otherwise noted) (see Figure 1) FROM TO PARAMETER PARAMETER (INPUT) (INPUT) (OUTPUT) (OUTPUT † This information was not available at the time of publication. ...

  • Page 5

    ... Waveform GND V OL (see Note B) LOW- AND HIGH-LEVEL ENABLING • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 SN74AUC1G08 SCES374L − SEPTEMBER 2001 − REVISED MAY 2005 TEST S1 t PLH /t PHL Open 2 × PLZ /t PZL t PHZ /t PZH GND ∆ ...

  • Page 6

    ... ACTIVE SN74AUC1G08DCKR ACTIVE SN74AUC1G08DCKRE4 ACTIVE SN74AUC1G08DCKRG4 ACTIVE SN74AUC1G08DRLR ACTIVE SN74AUC1G08DRLRG4 ACTIVE SN74AUC1G08YEAR ACTIVE SN74AUC1G08YEPR ACTIVE SN74AUC1G08YZAR ACTIVE SN74AUC1G08YZPR ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

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    ... TI product or service and is an unfair and deceptive business practice not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: ...