LM3S308 Luminary Micro, Inc, LM3S308 Datasheet - Page 314

no-image

LM3S308

Manufacturer Part Number
LM3S308
Description
Lm3s308 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S308
Manufacturer:
DSP
Quantity:
648
Part Number:
LM3S308-EQN25-C2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S308-EQN25-C2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S308-IGZ25-C2
Manufacturer:
AV
Quantity:
241
Company:
Part Number:
LM3S308-IGZ25-C2
Quantity:
982
Part Number:
LM3S308-IQN25
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S308-IQN25-C2
Manufacturer:
TI
Quantity:
202
Part Number:
LM3S308-IQN25-C2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S308-IQN25-C2
Manufacturer:
TI/德州仪器
Quantity:
5 288
Part Number:
LM3S308-IQN25-C2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Reset
Reset
Type
Type
Synchronous Serial Interface (SSI)
SSI Clock Prescale (SSICPSR)
SSI0 base: 0x4000.8000
Offset 0x010
Type R/W, reset 0x0000.0000
314
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
RO
RO
Register 5: SSI Clock Prescale (SSICPSR), offset 0x010
SSICPSR is the clock prescale register and specifies the division factor by which the system clock
must be internally divided before further use.
The value programmed into this register must be an even number between 2 and 254. The
least-significant bit of the programmed number is hard-coded to zero. If an odd number is written
to this register, data read back from this register has the least-significant bit as zero.
30
14
0
0
CPSDVSR
RO
RO
29
13
reserved
0
0
Name
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0x00
0x00
0
9
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI Clock Prescale Divisor
This value must be an even number from 2 to 254, depending on the
frequency of SSIClk. The LSB always returns 0 on reads.
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
CPSDVSR
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
June 04, 2008
R/W
RO
16
0
0
0

Related parts for LM3S308