LM3S308 Luminary Micro, Inc, LM3S308 Datasheet - Page 56
LM3S308
Manufacturer Part Number
LM3S308
Description
Lm3s308 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S308.pdf
(419 pages)
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System Control
Figure 6-2. Main Clock Tree
6.1.4.2
6.1.4.3
56
a. These are bit fields within the Run-Mode Clock Configuration (RCC) register.
OSC1
OSC2
1-8 MHz
Internal
12 MHz
■
The internal system clock (SysClk), is derived from any of the two sources plus two others: the
output of the main internal PLL, and the internal oscillator divided by four (3 MHz ± 30%). The
frequency of the PLL clock reference must be in the range of 3.579545 MHz to 8.192 MHz (inclusive).
Nearly all of the control for the clocks is provided by the Run-Mode Clock Configuration (RCC)
register.
Figure 6-2 on page 56 shows the logic for the main clock tree. The peripheral blocks are driven by
the system clock signal and can be programmatically enabled/disabled. The ADC clock signal is
automatically divided down to 16.67 MHz for proper ADC operation.
Crystal Configuration for the Main Oscillator (MOSC)
The main oscillator supports the use of a select number of crystals. If the main oscillator is used by
the PLL as a reference clock, the supported range of crystals is 3.579545 to 8.192 MHz, otherwise,
the range of supported crystals is 1 to 8.192 MHz.
The XTAL bit in the RCC register (see page 70) describes the available crystal choices and default
programming values.
Software configures the RCC register XTAL field with the crystal number. If the PLL is used in the
design, the XTAL field value is internally translated to the PLL settings.
Main PLL Frequency Configuration
The main PLL is disabled by default during power-on reset and is enabled later by software if
required. Software configures the main PLL input reference clock source, specifies the output divisor
to set the system clock frequency, and enables the main PLL to drive the output.
Main
Osc
Osc
Applications that do not depend on accurate clock sources may use this clock source to reduce
system cost.
Main Oscillator (MOSC): The main oscillator provides a frequency-accurate clock source by
one of two means: an external single-ended clock source is connected to the OSC0 input pin, or
an external crystal is connected across the OSC0 input and OSC1 output pins. The crystal value
allowed depends on whether the main oscillator is used as the clock reference source to the
PLL. If so, the crystal must be one of the supported frequencies between 3.579545 MHz through
8.192 MHz (inclusive). If the PLL is not being used, the crystal may be any one of the supported
frequencies between 1 MHz and 8.192 MHz. The single-ended clock source range is from DC
through the specified speed of the device. The supported crystals are listed in the XTAL bit field
in the RCC register (see page 70).
÷4
OSCSRC
a
PWRDN
(200 MHz
XTAL
OEN
output)
PLL
a
a
a
Preliminary
BYPASS
a
(16.667 MHz output)
Constant
SYSDIV
Divide
a
USESYSDIV
a
ADC Clock
System Clock
June 04, 2008
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