LM3S308 Luminary Micro, Inc, LM3S308 Datasheet - Page 8
LM3S308
Manufacturer Part Number
LM3S308
Description
Lm3s308 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S308.pdf
(419 pages)
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Table of Contents
List of Figures
Figure 1-1.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 6-2.
Figure 7-1.
Figure 8-1.
Figure 8-2.
Figure 8-3.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 9-4.
Figure 10-1.
Figure 11-1.
Figure 11-2.
Figure 11-3.
Figure 11-4.
Figure 11-5.
Figure 12-1.
Figure 12-2.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 13-4.
Figure 13-5.
Figure 13-6.
Figure 13-7.
Figure 13-8.
Figure 13-9.
Figure 13-10. MICROWIRE Frame Format (Single Frame) .................................................................... 303
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 304
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 304
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 14-4.
Figure 14-5.
Figure 14-6.
Figure 14-7.
8
Stellaris
CPU Block Diagram ......................................................................................................... 33
TPIU Block Diagram ........................................................................................................ 34
JTAG Module Block Diagram ............................................................................................ 43
Test Access Port State Machine ....................................................................................... 46
IDCODE Register Format ................................................................................................. 50
BYPASS Register Format ................................................................................................ 50
Boundary Scan Register Format ....................................................................................... 51
External Circuitry to Extend Reset .................................................................................... 53
Main Clock Tree .............................................................................................................. 56
Flash Block Diagram ...................................................................................................... 110
GPIO Port Block Diagram ............................................................................................... 127
GPIODATA Write Example ............................................................................................. 128
GPIODATA Read Example ............................................................................................. 128
GPTM Module Block Diagram ........................................................................................ 165
16-Bit Input Edge Count Mode Example .......................................................................... 169
16-Bit Input Edge Time Mode Example ........................................................................... 170
16-Bit PWM Mode Example ............................................................................................ 171
WDT Module Block Diagram .......................................................................................... 200
ADC Module Block Diagram ........................................................................................... 224
Differential Sampling Range, V
Differential Sampling Range, V
Differential Sampling Range, V
Internal Temperature Sensor Characteristic ..................................................................... 228
UART Module Block Diagram ......................................................................................... 257
UART Character Frame ................................................................................................. 258
SSI Module Block Diagram ............................................................................................. 295
TI Synchronous Serial Frame Format (Single Transfer) .................................................... 298
TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 298
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 299
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 299
Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 300
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 301
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 301
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 302
I
I
START and STOP Conditions ......................................................................................... 333
Complete Data Transfer with a 7-Bit Address ................................................................... 334
R/S Bit in First Byte ........................................................................................................ 334
Data Validity During Bit Transfer on the I
Master Single SEND ...................................................................................................... 337
2
2
C Block Diagram ......................................................................................................... 332
C Bus Configuration .................................................................................................... 333
®
300 Series High-Level Block Diagram ................................................................ 25
IN_ODD
IN_ODD
IN_ODD
Preliminary
= 1.5 V .................................................................. 227
= 0.75 V ................................................................ 227
= 2.25 V ................................................................ 228
2
C Bus ............................................................... 334
June 04, 2008
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