MT29F8G08FABWP-ET Micron, MT29F8G08FABWP-ET Datasheet - Page 17

• Manufacturer Part Number: MT29F8G08FABWP-ET
• Description: 8Gb Mass Storage - OBSOLETE
• Manufacturer: Micron

Data Input
READs
Ready/Busy#
Figure 11:
PDF: 09005aef818a56a7 / Source: 09005aef81590bdd
2gb_nand_m29b__2.fm - Rev. I 1/06 EN
Time Constants
RANDOM DATA INPUT and OUTPUT commands need only column addresses, so only
two ADDRESS cycles are required. Refer to the command descriptions to determine the
addressing requirements for each command.
Data is written to the data register on the rising edge of WE# when:
• CE#, CLE, and ALE are LOW, and
• The device is not busy
Data is input on I/O[7:0] for x8 devices, and I/O[15:0] on x16 devices. See Figure 36 on
page 43 for additional data input details.
After a READ command is sent to the memory device, data is transferred from the mem-
ory array to the data register in
register, it is clocked out of the part by RE# going LOW. See Figure 39 on page 44 for
detailed timing information.
The READ STATUS (70h) command or the R/B# signal can be used to determine when
the device is ready. See the STATUS READ command section on page 27 for details.
The R/B# output provides a hardware method of indicating the completion of a PRO-
GRAM/ERASE/READ operation. The signal is typically HIGH, and transitions to LOW
after the appropriate command is written to the device. The signal pin’s open-drain
driver enables multiple R/B# outputs to be OR-tied. The signal requires a pull-up resis-
tor for proper operation. The READ STATUS command can be used in place of R/B#.
Typically R/B# would be connected to an interrupt pin on the system controller. See
Figure 12 on page 18.
On the 8Gb MT29F8G08FAB, R/B# provides an indication for the 4Gb section enabled by
CE#, and R/B2# does the same for the 4Gb section enabled by CE2#. R/B# and R/B2# can
be tied together, or they can be used separately to provide independent indications for
each 4Gb section.
The combination of Rp and capacitive loading of the R/B# circuit determines the rise
time of the R/B# pin. The actual value used for Rp (Rp = resistance of pull-up resistor)
depends on the system timing requirements. Large values of Rp cause R/B# to be
delayed significantly. At the 10- to 90-percent points on the R/B# waveform, rise time is
approximately two time constants (TC).
TC = R × C
Where R = Rp (resistance of pull-up resistor), and C = total capacitive load.
The fall time of the R/B# signal is determined mainly by the output impedance of the
R/B# pin and the total load capacitance.
Refer to Figure 13 on page 18, and Figure 14 on page 19, which depict approximate Rp
values using a circuit load of 100pF.
The minimum value for Rp is determined by the output drive capability of the R/B# sig-
nal, the output voltage swing, and V
2, 4, 8Gb: x8/x16 Multiplexed NAND Flash Memory
17
t
R. Typically
CC
.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
R is 25µs. When data is available in the data
©2004 Micron Technology, Inc. All rights reserved.
Bus Operation