MT9042CPR1 Zarlink Semiconductor, Inc., MT9042CPR1 Datasheet

no-image

MT9042CPR1

Manufacturer Part Number
MT9042CPR1
Description
Dual Reference Frequency Selectable Digital PLL with Multiple Clock Outputs for T1/E1 (ITU-T G.812 type IV) and Stratum (3, 4, 4E) Applications
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT9042CPR1
Manufacturer:
ZARLINK
Quantity:
1 001
Features
Applications
Meets jitter requirements for: AT&T TR62411
Stratum 3, 4 and Stratum 4 Enhanced for DS1
interfaces; and for ETSI ETS 300 011, TBR 4,
TBR 12 and TBR 13 for E1 interfaces
Provides C1.5, C3, C2, C4, C8 and C16 output
clock signals
Provides 8kHz ST-BUS framing signals
Selectable 1.544MHz, 2.048MHz or 8kHz input
reference signals
Accepts reference inputs from two independent
sources
Provides bit error free reference switching -
meets phase slope and MTIE requirements
Operates in either Normal, Holdover and
Freerun modes
Synchronization and timing control for
multitrunk T1 and E1 systems
ST-BUS clock and frame pulse sources
Primary Trunk Rate Converters
OSCo
RSEL
LOS1
LOS2
OSCi
SEC
PRI
Reference
MS1
Master
Select
Clock
MUX
Reference
Select
Control State Machine
Automatic/Manual
MS2
Corrector
Selected
Enable
Refer-
ence
TIE
RST
Figure 1 - Functional Block Diagram
Corrector
TRST
Circuit
TIE
Select
State
Virtual
Refer-
ence
GTo
Guard Time
Impairment
Description
The MT9042C Multitrunk System Synchronizer
contains a digital phase-locked loop (DPLL), which
provides timing and synchronization signals for
multitrunk T1 and E1 primary rate transmission links.
The MT9042C generates ST-BUS clock and framing
signals that are phase locked to either a 2.048MHz,
1.544MHz, or 8kHz input reference.
The MT9042C is compliant with AT&T TR62411
Stratum 3, 4 and 4 Enhanced, and ETSI ETS 300
011. It will meet the jitter tolerance, jitter transfer,
intrinsic
accuracy, capture range, phase slope and MTIE
requirements for these specifications.
DS5144
Monitor
Circuit
DPLL
Input
Select
State
GTi
Multitrunk System Synchronizer
MT9042CP
VDD
jitter,
Feedback
VSS
Ordering Information
-40
FS1
frequency
Frequency
Interface
Output
Circuit
Select
°
MUX
C to +85
28 Pin PLCC
ISSUE 3
FS2
°
accuracy,
C
MT9042C
holdover
C1.5o
C3o
C2o
C4o
C8o
C16o
F0o
F8o
F16o
June 2000
1

Related parts for MT9042CPR1

MT9042CPR1 Summary of contents

Page 1

Features • Meets jitter requirements for: AT&T TR62411 Stratum 3, 4 and Stratum 4 Enhanced for DS1 interfaces; and for ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 for E1 interfaces • Provides C1.5, C3, C2, C4, ...

Page 2

MT9042C Pin Description Pin # Name 1,15 V Ground. 0 Volts TRST TIE Circuit Reset (TTL Input). A logic low at this input resets the Time Interval Error (TIE) correction circuit resulting in a re-alignment of input phase ...

Page 3

Pin Description Pin # Name 16 C8o Clock 8.192MHz (CMOS Output). This output is used for ST-BUS operation at 8.192Mb/s. 17 C16o Clock 16.384MHz (CMOS Output). This output is used for ST-BUS operation at 16.384Mb/s. 19 GTi Guard Time (Schmitt ...

Page 4

MT9042C Functional Description The MT9042C is a Multitrunk System Synchronizer, providing timing (clock) and synchronization (frame) signals to interface circuits for T1 and E1 Primary Rate Digital Transmission links. Figure functional block diagram which is described in ...

Page 5

Virtual Reference Phase from Detector TIE Corrector Feedback Signal from Frequency Select MUX from Normal to Holdover. In Holdover Mode, the DPLL no longer uses the virtual reference signal, but generates an accurate clock signal using storage techniques. The Compare ...

Page 6

MT9042C Digitally Controlled Oscillator (DCO) - the DCO receives the limited and filtered signal from the Loop FIlter, and based on its value, generates a corresponding digital output synchronization method of the DCO is dependent on the state of the ...

Page 7

DPLL and the Guard Time Circuit. Control is based on the logic levels at the control inputs LOS1, LOS2, RSEL, MS1, MS2 and GTi of the Guard Time Circuit (See Figure 6 TIE To DPLL Reference Corrector State ...

Page 8

MT9042C Automatic Control Automatic Control should be used when simple MT9042C control is required, which is more complex than the very simple control provide by Manual Control with no external circuitry, but not as complex as Manual Control with a ...

Page 9

Description Input Controls MS2 MS1 RSEL GTi Legend Change / Not Valid MTIE State ...

Page 10

MT9042C Description Input Controls LOS2 LOS1 GTi RST Legend Change MTIE State ...

Page 11

MT9042C Measures of Performance The following are some synchronizer performance indicators and their corresponding definitions. Intrinsic Jitter Intrinsic jitter is the jitter produced synchronizing circuit and is measured at its output measured by applying a reference signal with ...

Page 12

MT9042C Holdover Accuracy Holdover accuracy is defined as the absolute tolerance of an output clock signal, when it is not locked to an external reference signal, but is operating using storage techniques. MT9042C, the storage value is determined while the ...

Page 13

MT9042C and Network Specifications The MT9042C fully meets all applicable PLL requirements (intrinsic jitter, jitter tolerance, jitter transfer, frequency accuracy, holdover accuracy, capture range, phase change slope and MTIE during reference rearrangement) for specifications. 1. AT&T TR62411 (DS1) December 1990 ...

Page 14

MT9042C CTS CXO-65-HG-5-C-20.0MHz Frequency: 20MHz Tolerance: 25ppm 0C to 70C Rise & Fall Time: 8ns (0.5V 4.5V 50pF) Duty Cycle: 45% to 55% The output clock should be connected directly (not AC coupled) to the OSCi input of the MT9042C, ...

Page 15

SEC SIGNAL STATUS LOS2 PRI SIGNAL GOOD STATUS LOS1 GTo V SIH GTi MT9042C PRI STATE NORMAL HOLDOVER NOTES represents the time delay from when the reference goes D bad to when the MT9042C is provided with a ...

Page 16

MT9042C MT9074 To Line 1 DSTo TTIP DSTi To TRING TX Line XFMR F0i RTIP C4i To RRING RX Line XFMR E1.5o LOS MT9074 To Line 2 DSTo TTIP DSTi TRING To TX Line XFMR F0i RTIP C4i RRING To ...

Page 17

To Line 1 MT9075 DSTo TTIP To DSTi TX Line TRING XFMR F0i RTIP C4i To RRING RX Line RxFP XFMR LOS MT9075 To Line 2 DSTo TTIP DSTi To TRING TX Line XFMR F0i RTIP C4i RRING To RX ...

Page 18

MT9042C Dual T1 Reference Sources with MT9042C in Automatic Control For systems requiring simple state machine control, the application circuit shown in Figure 14 using Automatic Control may be used. In this circuit, the MT9042C Automatically, is using a Guard ...

Page 19

MT9042C Absolute Maximum Ratings* - Parameter 1 Supply voltage 2 Voltage on any pin 3 Current on any pin 4 Storage temperature 5 PLCC package power dissipation * Exceeding these values may cause permanent damage. Functional operation under these conditions ...

Page 20

AC Electrical Characteristics - Performance Characteristics 1 Freerun Mode accuracy with OSCi at Holdover Mode accuracy with OSCi at Capture range with OSCi at Phase lock time 11 Output phase continuity ...

Page 21

MT9042C AC Electrical Characteristics - Input/Output Timing Characteristics 1 Reference input pulse width high or low 2 Reference input rise or fall time 3 8kHz reference input to F8o delay 4 1.544MHz reference input to F8o delay 5 2.048MHz reference ...

Page 22

PRI/SEC 8kHz PRI/SEC 1.544MHz PRI/SEC 2.048MHz F8o NOTES: 1. Input to output delay values are valid after a TRST or RST with no further state changes Figure 19 - Input to Output Timing (Normal Mode) F8o F0o F16o t C16WL ...

Page 23

MT9042C F8o MS1,2 LOS1,2 RSEL, GTi Figure 21 - Input Controls Setup and Hold Timing AC Electrical Characteristics - Intrinsic Jitter Unfiltered Characteristics 1 Intrinsic jitter at F8o (8kHz) 2 Intrinsic jitter at F0o (8kHz) 3 Intrinsic jitter at F16o ...

Page 24

AC Electrical Characteristics - 8kHz Input to 8kHz Output Jitter Transfer Characteristics 1 Jitter attenuation for 1Hz@0.01UIpp input 2 Jitter attenuation for 1Hz@0.54UIpp input 3 Jitter attenuation for 10Hz@0.10UIpp input 4 Jitter attenuation for 60Hz@0.10UIpp input 5 Jitter attenuation for ...

Page 25

MT9042C AC Electrical Characteristics - 8kHz Input Jitter Tolerance Characteristics 1 Jitter tolerance for 1Hz input 2 Jitter tolerance for 5Hz input 3 Jitter tolerance for 20Hz input 4 Jitter tolerance for 300Hz input 5 Jitter tolerance for 400Hz input ...

Page 26

AC Electrical Characteristics - OSCi 20MHz Master Clock Input Characteristics 1 Frequency accuracy (20 MHz nominal Duty cycle 5 Rise time 6 Fall time † See "Notes" following AC Electrical Characteristics tables. † Notes: Voltages are with ...

Page 27

...

Page 28

For more information about all Zarlink products visit our Web Site at www.zarlink.com ’ ’ “ ” ...

Related keywords