MT9044AP1 Zarlink Semiconductor, Inc., MT9044AP1 Datasheet

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Features • Supports AT&T TR62411 and Bellcore GR-1244- CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces • Supports ITU-T G.812 Type IV clocks for ...

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Description The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links. The MT9044 generates ST-BUS clock and framing signals that are ...

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Pin Description Pin # Pin # Name PLCC MQFP 1,10, 39,4,17 V Ground. 0 Volts. SS 23,31 , TCK Test Clock (TTL Input): Provides the clock to the JTAG test logic. This pin is internally pulled up to ...

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Pin Description (continued) Pin # Pin # Name PLCC MQFP 19 13 C2o Clock 2.048MHz (CMOS Output). This output is used for ST-BUS operation at 2.048Mb/ C4o Clock 4.096MHz (CMOS Output). This output is used for ST-BUS operation ...

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Pin Description (continued) Pin # Pin # Name PLCC MQFP 37 31 MS1 Mode/Control Select 1 (TTL Input). the rising edge of F8o. See pin description for MS2. This pin is internally pulled down to VSS RSEL Reference ...

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FS2 Time Interval Error (TIE) Corrector Circuit The TIE corrector circuit, when enabled, prevents a step change in phase on the input reference signals (PRI or SEC) from causing a step change in phase at the input of the DPLL ...

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The DPLL now uses the new virtual reference signal, and since no phase step took place at the input of the DPLL, no phase step occurs at the output of the DPLL. In other words, reference switching will not create ...

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In Normal Mode, the DCO provides an output signal which is frequency and phase locked to the selected input reference signal. In Holdover Mode, the DCO is free running at a frequency equal to the last (less 30ms to 60ms) ...

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The T1 and E1 signals are generated from a common DPLL signal. Consequently, the clock outputs C1.5o, C3o, C2o, C4o, C8o, C16o, F0o, F16o and C6o are locked to one another for all operating states, and are also locked to ...

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Guard Time Circuit The GTi pin is used by the Automatic/Manual Control State Machine in the MT9044 under either Manual or Automatic control. The logic level at the GTi pin performs two functions, it enables and disables the TIE Corrector ...

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Manual Control Manual Control should be used when either very simple MT9044 control is required, or when complex control is required which is not accommodated by Automatic Control. For example, very simple control could include operation in a system which ...

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The frequency accuracy of Holdover Mode is ±0.05ppm, which translates to a worst case 35 frame (125us) slips in 24 hours. This meets the Bellcore GR-1244-CORE Stratum 3 requirement of ±0.37ppm (255 frame slips per 24 hours). Two factors affect ...

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Description Input Controls MS2 MS1 RSEL GTi Legend Change / Not Valid MTIE State ...

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Description Input Controls LOS2 LOS1 GTi RST Legend Change MTIE State change ...

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MT9044 Measures of Performance The following are some synchronizer performance indicators and their corresponding definitions. Intrinsic Jitter Intrinsic jitter is the jitter produced by the synchronizing circuit and is measured at its output measured by applying a reference ...

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Note that the resulting jitter transfer functions for all combinations of inputs (8kHz, 1.544MHz, 2.048MHz) and outputs (8kHz, 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, 16.384MHz) for a given input signal (jitter frequency and jitter amplitude) are the same. Since intrinsic jitter is ...

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Phase Continuity Phase continuity is the phase difference between a given timing signal and an ideal timing signal at the end of a particular observation period. Usually, the given timing signal and the ideal timing signal are of the same ...

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Applications This section contains MT9044 application specific details for clock and crystal operation, guard time usage, reset operation, power supply decoupling, Manual Control operation and Automatic Control operation. Master Clock The MT9044 can use either a clock or crystal as ...

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The accuracy of a crystal oscillator depends on the crystal tolerance as well as the load capacitance tolerance. Typically, for a 20MHz crystal specified with a 32pF load capacitance, each 1pF change ...

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A simple way to control the guard time (using Automatic Control) is with an RC circuit as shown in Figure 11. Resistor R is for protection only and limits the current flowing into the GTi pin during power down conditions. ...

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Figure 13 shows a typical timing example of an unsymmetrical Guard Time Circuit with the MT9044 in Automatic Control. SEC SIGNAL STATUS LOS2 PRI SIGNAL GOOD STATUS LOS1 GTo V SIH GTi MT9044 PRI STATE NORMAL HOLDOVER NOTES ...

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Reset Circuit A simple power up reset circuit with about a 50us reset low time is shown in Figure 14. Resistor R only and limits current into the RST pin during power down conditions. The reset low time is not ...

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MT9074 To Line 1 DSTo TTIP DSTi To TRING TX Line XFMR F0i RTIP C4i To RRING RX Line XFMR E1.5o LOS MT9074 To Line 2 DSTo TTIP DSTi To TRING TX Line XFMR F0i RTIP C4i RRING To RX ...

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To Line 1 MT9075 DSTo TTIP To DSTi TX Line TRING XFMR F0i RTIP C4i To RRING RX Line RxFP XFMR LOS To Line 2 MT9075 DSTo TTIP DSTi To TRING TX Line XFMR RTIP F0i C4i RRING To RX ...

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For complete Manual Control state machine details, refer to Table 4 for the State Table, and Figure 7 for the State Diagram. Single Reference Source E1 to STS-3 with 8 kHz Reference The device may operate in freerun mode or ...

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Absolute Maximum Ratings* - Parameter 1 Supply voltage 2 Voltage on any pin 3 Current on any pin 4 Storage temperature 5 PLCC package power dissipation 6 MQFP package power dissipation * Exceeding these values may cause permanent damage. Functional ...

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AC Electrical Characteristics - Performance Characteristics 1 Freerun Mode accuracy with OSCi at Holdover Mode accuracy with OSCi at Capture range with OSCi at Phase lock time 11 Output phase continuity ...

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ALL SIGNALS t t IRF, ORF Figure 18 - Timing Parameter Measurement Voltage Levels AC Electrical Characteristics - Input/Output Timing Characteristics 1 Reference input pulse width high or low 2 Reference input rise or fall time 3 8kHz reference input ...

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AC Electrical Characteristics - Input/Output Timing Characteristics 27 RSP pulse width high 28 C19o pulse width high or low 29 F0o pulse width low 30 F8o pulse width high 31 F16o pulse width low 32 Output clock and frame pulse ...

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F8o F0o F16o t C16WL C16o t t C8W C8W C8o t C4W C4o C2o t C6W C6o C3o C1.5o t C19W C19o Figure 20 - Output Timing 1 F8o C2o RSP t TSPW TSP Figure 21 - Output Timing ...

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F8o MS1,2 LOS1,2 RSEL, GTi Figure 22 - Input Controls Setup and Hold Timing AC Electrical Characteristics - Intrinsic Jitter Unfiltered Characteristics 1 Intrinsic jitter at F8o (8kHz) 2 Intrinsic jitter at F0o (8kHz) 3 Intrinsic jitter at F16o (8kHz) ...

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AC Electrical Characteristics - C2o (2.048MHz) Intrinsic Jitter Filtered Characteristics 1 Intrinsic jitter (4Hz to 100kHz filter) 2 Intrinsic jitter (10Hz to 40kHz filter) 3 Intrinsic jitter (8kHz to 40kHz filter) 4 Intrinsic jitter (10Hz to 8kHz filter) † See ...

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AC Electrical Characteristics - 2.048MHz Input to 2.048 MHz Output Jitter Transfer Characteristics 1 Jitter at output for 1Hz@3.00UIpp input 2 with 40Hz to 100kHz filter 3 Jitter at output for 3Hz@2.33UIpp input 4 with 40Hz to 100kHz filter 5 ...

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AC Electrical Characteristics - 1.544MHz Input Jitter Tolerance Characteristics 1 Jitter tolerance for 1Hz input 2 Jitter tolerance for 5Hz input 3 Jitter tolerance for 20Hz input 4 Jitter tolerance for 300Hz input 5 Jitter tolerance for 400Hz input 6 ...

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AC Electrical Characteristics - OSCi 20MHz Master Clock Input Characteristics 1 Frequency accuracy (20 MHz nominal Duty cycle 5 Rise time 6 Fall time † See "Notes" following AC Electrical Characteristics tables. † Notes: Voltages are with ...

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