MT9171AE Zarlink Semiconductor, Inc., MT9171AE Datasheet
MT9171AE
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MT9171AE Summary of contents
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... Prescrambler Interface CDSTo/ CDo 2 ISO -CMOS ST-BUS Digital Subscriber Interface Circuit Digital Network Interface Circuit DS5130 MT9171AE MT9171AN MT9171AP MT9172AE MT9172AN MT9172AP Description The MT9171 (DSIC) and MT9172 (DNIC) are pin for pin compatible replacements for the MT8971 and MT8972, respectively. ...
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MT9171/ LOUT 2 21 VBias 20 VRef 3 19 MS2 MS1 17 MS0 6 16 RegC F0/CLD 14 9 CDSTi/CDi 13 10 CDSTo/CDo 12 11 VSS 22 PIN PDIP Pin Description Pin ...
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Advance Information Pin Description (continued) Pin # Name DSTi/Di Data ST-BUS In/Data In (Digital). A 2.048 Mbit/s serial PCM/data input in DN mode. In MOD mode this is a continuous bit stream at the ...
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MT9171/ DSTi DSTo F0o Channel Time 0 Figure Port - 80 kbit/s (Modes DSTi ...
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Advance Information Functional Description The MT9171/ device which may be used in practically any application that requires high speed data transmission over two wires, including smart telephone sets, workstations, data terminals and computers. The device supports the 2B+D ...
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MT9171/72 9-120 Advance Information ...
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Advance Information In DIGITAL NETWORK (DN) mode, upon entering the DNIC from the DV and CD ports, the B-channel data, D-channel D0 (and D1 for 160 kbit/s), the HK bit of the C-channel (160kbit/s only) and a SYNC bit are ...
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MT9171/72 of the near end signal may be disabled by holding the Precan pin high. This mode simplifies the design of external line transceivers used for loop extension applications. The Precan pin features an internal pull-down which allows this unconnected ...
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Advance Information the C-channel and D-Channel also at kbit/ mode, both the DV and CD ports operate as ST-BUS streams at 2.048 Mbit/s. transfers data over pins DSTi and DSTo while on the CD port, the CDSTi and ...
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MT9171/72 channel 16 or vice versa. One other feature exists; ODE, where both the DV and CD ports are tristated in order that no devices are damaged due to excessive loading while all DNICs are in a random state on ...
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Advance Information transparently through the DNIC and is transmitted to or received from the line at the bit rate selected in the Control Register. If the bit rate is 80 kbit/s, only D0 is transmitted and received. At 160 kbit/s, ...
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MT9171/72 C-Channel Internal Control (Bit 0-7) Register XXX01111 00000000 XXX11111 00010000 Notes: Default Mode 1 can also be selected by tying CDSTi/CDi pin low when DNIC is operating in dual mode. Default Mode 2 can also be selected by tying ...
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Advance Information 0 1 SYNC CHQual Status Name Register 0 SYNC Synchronization - When set this bit indicates that synchronization to the received line data sync pattern has been acquired. For DN mode only. 1-2 CHQual Channel Quality - These ...
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MT9171/72 Bits Bit 7 Bit 6 Data 1 1 NRZ Data Differential Encoded Differential Encoded Biphase Transmit Line Signal Note: Last bit sent was a logic SYNC OUT Figure 11 - Frame Format ...
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Advance Information Applications Typical connection diagrams are shown in Figures 13 and 14 for the DN mode as a MASTER and SLAVE, respectively connected to the coupling OUT transformer through a resistor R2 and capacitors C2 and C2’ ...
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MT9171/72 Absolute Maximum Ratings Parameter 1 Supply Voltage 2 Voltage on any pin (other than supply) 3 Current on any pin (other than supply) 4 Storage Temperature 5 Package Power Dissipation (Derate 16mW/ C above Exceeding these ...
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Advance Information AC Electrical Characteristics Characteristics 1 Input Voltage 2 Input Impedance I 3 Crystal/Clock Frequency Crystal/Clock Tolerance U 5a Crystal/Clock Duty Cycle Crystal/Clock Duty Cycle 6 Crystal/Clock Loading 7 Output Capacitance O U ...
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MT9171/72 2.0V C4 0.8V 2.0V F0 0.8V Figure Clock & Frame Pulse Alignment for ST-BUS Streams in DN Mode 2.0V C4 0.8V 3.0V OSC1 2.0V Figure 17 - Frequency Locking for the C4 and OSC1 Clocks in ...
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Advance Information AC Electrical Characteristics Characteristics 1 DSTi/CDSTi Data Setup Time 2 DSTi/CDSTi Data Hold Time 3a DSTo/CDSTo Data Delay 3b DSTo/CDSTo High Z to Data Delay † Timing is over recommended temperature & power supply voltage ranges. Bit Stream ...
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MT9171/72 Tx Bit Stream 2.4V TCK 0.4V 2.0V Di CDI 0.8V 2.4V CDo 0.4V Rx Bit Stream RCK 2.4V Do 0.4V Figure 20 - Data Timing for Master Modem Mode 9-134 Bit Cell Bit Cell t ...
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Advance Information 2.4V TCK 0.4V 2.0V Di CDI 0.8V 2.4V CDo 0.4V RCK 2.4V Do 0.4V Figure 21 - Data Timing for Slave Modem Mode MT9171/ 9-135 ...
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For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors ...