MT8889CN Zarlink Semiconductor, Inc., MT8889CN Datasheet
MT8889CN
Available stocks
Related parts for MT8889CN
MT8889CN Summary of contents
Page 1
... Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. MT8889C Integrated DTMF Transceiver with Adaptive Micro Interface Data Sheet Ordering Information MT8889CE 20 Pin Plastic DIP MT8889CS 20 Pin SOIC MT8889CN 24 Pin SSOP MT8889CP 28 Pin Plastic LCC - +85 C Data Bus Buffer Interrupt Logic A I/O Control ...
Page 2
A call progress mode can be selected so that frequencies within the specified passband can be detected. The adaptive micro interface allows microcontrollers, such as the 68HC11, 80C51 and ...
Page 3
Pin Description (continued) Pin # Name IRQ/CP Interrupt Request/Call Progress (open drain) output. In interrupt mode, this output goes low when a valid DTMF tone burst has been transmitted or received. In call progress ...
Page 4
MT8889C VOLTAGE GAIN ( Figure 3 - Single-Ended Input Configuration DIFFERENTIAL INPUT AMPLIFIER ...
Page 5
F LOW 852 852 852 941 941 941 697 770 852 941 Table 1 - Functional Encode/Decode Table (continued) 0= LOGIC LOW, 1= LOGIC HIGH Following the filter section is a decoder employing digital counting techniques to determine the frequencies ...
Page 6
V Guard Time Adjustment The simple steering circuit shown in Figure 5 is adequate for most applications. Component values are chosen according to the following inequalities (see Figure 7 St/GT ESt V DD St/GT ESt MT8889C DD MT8889C ...
Page 7
The value device parameter (see AC Electrical Characteristics) and recognized by the receiver. A value for recommended for most applications, leaving selected by the ...
Page 8
LEVEL (dBm) -25 EXPLANATION OF EVENTS A) TONE BURSTS DETECTED, TONE DURATION INVALID, RX DATA REGISTER NOT UPDATED. B) TONE #n DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN RX DATA REGISTER. C) END OF TONE #n DETECTED, TONE ...
Page 9
DTMF Generator The DTMF transmitter employed in the MT8889C is capable of generating all sixteen standard DTMF tone pairs with low distortion and high accuracy. All frequencies are derived from an external 3.579545 MHz crystal. The sinusoidal waveforms for ...
Page 10
Burst Mode In certain telephony applications it is required that DTMF signals being generated are of a specific duration determined either by the particular application or by any one of the exchange transmitter specifications currently existing. Standard DTMF signal ...
Page 11
Distortion Calculations The MT8889C is capable of producing precise tone bursts with minimal error in frequency (see Table 2). The internal summing amplifier is followed by a first-order lowpass switched capacitor filter to minimize harmonic components and intermodulation products. ...
Page 12
MT8889C OSC1 OSC2 3.579545 MHz 10.0 Microprocessor Interface The MT8889C design incorporates an adaptive interface, which allows connected to various kinds of microprocessors. Key functions of this interface include the following: • Continuous activity on DS/RD is ...
Page 13
A software reset must be included at the beginning of all programs to initialize the control registers upon power-up or power reset (see Figure 17). Refer to Tables 4-7 for bit descriptions of the two control registers. The multiplexed IRQ/CP ...
Page 14
MC6800/6802 A0-A15 CS RS0 VMA D0-D3 D0-D3 R/W/ DS/RD (a) MC6809 A0-A15 CS RS0 Q E D0-D3 D0-D3 R/W/WR R/W DS/RD Figure & MT8889 Interface Connections for Various Intel and Motorola Micros BIT ...
Page 15
BIT NAME b0 BURST Burst Mode Select. A logic high de-activates burst mode; a logic low enables burst mode. When activated, the digital code representing a DTMF signal (see Table 1) can be written to the transmit register, which will ...
Page 16
C1 R1 DTMF/CP INPUT R2 R5 X-tal DTMF OUTPUT Notes: R1 100 374 3 4 (min.) L ...
Page 17
A software reset must be included at the beginning of all programs to initialize the control registers after power up. The initialization procedure should be implemented 100ms after power up. Description: 1) Read Status Register 2) Write to Control Register ...
Page 18
Absolute Maximum Ratings* Parameter 1 Power supply voltage Voltage on any pin 3 Current at any pin (Except V DD and 4 Storage temperature 5 Package power dissipation * Exceeding these values may cause permanent damage. ...
Page 19
DC Electrical Characteristics (continued Characteristics 17 ESt Source current and 18 Sink current St/GT 19 IRQ/ Sink current CP † Characteristics are over recommended operating conditions unless otherwise stated. ‡ Typical figures are at ...
Page 20
AC Electrical Characteristics - Voltages are with respect to ground (V ) unless otherwise stated Characteristics 1 Positive twist accept 2 Negative twist accept 3 Freq. deviation accept R 4 Freq. deviation reject X 5 Third tone ...
Page 21
AC Electrical Characteristics (continued) - Voltages are with respect to ground (V ), unless otherwise stated. SS Characteristics 5 Tone burst duration 6 Tone pause duration 7 Tone burst duration (extended) 8 Tone pause duration (extended ...
Page 22
AC Electrical Characteristics - MPU Interface (continued) - Voltages are with respect to ground (V ), unless otherwise stated. SS Characteristics 16 Input Capacitance (data bus) 17 Output Capacitance (IRQ/CP) † Characteristics are over recommended operating conditions unless otherwise ...
Page 23
DS Q clk* A0-A15 (RS0) R/W(read) Read Data (D3-D0) R/W (write) Write data (D3-D0 Q).Addr [MC6809 VMA.Addr [MC6800, MC6802] *microprocessor pin Figure 19 - MC6800/MC6802/MC6809 Timing Diagram Note from data to DS ...
Page 24
DS R/W t Read AD3-AD0 (RS0, D0-D3) Write AD3-AD0 (RS0-D0-D3) Addr * non-mux AS.Addr * microprocessor pins Figure 20 - MC68HC11 Bus Timing (with multiplexed address and data buses) ALE P0* A0-A7 (RS0, ...
Page 25
ALE P0* (RS0, A0-A7 D0-D3 (Addr ALE.Addr * microprocessor pins Figure 22 - 8031/8051/8085 Write Timing Diagram MT8889C t CSS t DSW t AH Data A8-A15 Address t CSH 25 Zarlink Semiconductor Inc. ...
Page 26
...
Page 27
...
Page 28
...
Page 29
For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors ...